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Implement negation of longs efficiently. For this testcase:
long %test(long %X) { %Y = sub long 0, %X ret long %Y } We used to generate: test: sub %ESP, 4 mov DWORD PTR [%ESP], %ESI mov %ECX, DWORD PTR [%ESP + 8] mov %ESI, DWORD PTR [%ESP + 12] mov %EAX, 0 mov %EDX, 0 sub %EAX, %ECX sbb %EDX, %ESI mov %ESI, DWORD PTR [%ESP] add %ESP, 4 ret Now we generate: test: mov %EAX, DWORD PTR [%ESP + 4] mov %EDX, DWORD PTR [%ESP + 8] neg %EAX adc %EDX, 0 neg %EDX ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12681 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1690,14 +1690,23 @@ void ISel::emitSimpleBinaryOperation(MachineBasicBlock *MBB,
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unsigned Class = getClassB(Op0->getType());
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unsigned Class = getClassB(Op0->getType());
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// sub 0, X -> neg X
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// sub 0, X -> neg X
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if (OperatorClass == 1 && Class != cLong)
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if (OperatorClass == 1)
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if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0)) {
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if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0)) {
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if (CI->isNullValue()) {
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if (CI->isNullValue()) {
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unsigned op1Reg = getReg(Op1, MBB, IP);
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unsigned op1Reg = getReg(Op1, MBB, IP);
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static unsigned const NEGTab[] = {
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static unsigned const NEGTab[] = {
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X86::NEG8r, X86::NEG16r, X86::NEG32r
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X86::NEG8r, X86::NEG16r, X86::NEG32r, 0, X86::NEG32r
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};
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};
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BuildMI(*MBB, IP, NEGTab[Class], 1, DestReg).addReg(op1Reg);
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BuildMI(*MBB, IP, NEGTab[Class], 1, DestReg).addReg(op1Reg);
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if (Class == cLong) {
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// We just emitted: Dl = neg Sl
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// Now emit : T = addc Sh, 0
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// : Dh = neg T
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unsigned T = makeAnotherReg(Type::IntTy);
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BuildMI(*MBB, IP, X86::ADC32ri, 2, T).addReg(op1Reg+1).addImm(0);
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BuildMI(*MBB, IP, X86::NEG32r, 1, DestReg+1).addReg(T);
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}
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return;
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return;
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}
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}
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} else if (ConstantFP *CFP = dyn_cast<ConstantFP>(Op0))
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} else if (ConstantFP *CFP = dyn_cast<ConstantFP>(Op0))
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@ -1690,14 +1690,23 @@ void ISel::emitSimpleBinaryOperation(MachineBasicBlock *MBB,
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unsigned Class = getClassB(Op0->getType());
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unsigned Class = getClassB(Op0->getType());
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// sub 0, X -> neg X
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// sub 0, X -> neg X
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if (OperatorClass == 1 && Class != cLong)
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if (OperatorClass == 1)
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if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0)) {
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if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0)) {
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if (CI->isNullValue()) {
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if (CI->isNullValue()) {
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unsigned op1Reg = getReg(Op1, MBB, IP);
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unsigned op1Reg = getReg(Op1, MBB, IP);
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static unsigned const NEGTab[] = {
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static unsigned const NEGTab[] = {
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X86::NEG8r, X86::NEG16r, X86::NEG32r
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X86::NEG8r, X86::NEG16r, X86::NEG32r, 0, X86::NEG32r
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};
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};
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BuildMI(*MBB, IP, NEGTab[Class], 1, DestReg).addReg(op1Reg);
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BuildMI(*MBB, IP, NEGTab[Class], 1, DestReg).addReg(op1Reg);
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if (Class == cLong) {
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// We just emitted: Dl = neg Sl
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// Now emit : T = addc Sh, 0
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// : Dh = neg T
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unsigned T = makeAnotherReg(Type::IntTy);
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BuildMI(*MBB, IP, X86::ADC32ri, 2, T).addReg(op1Reg+1).addImm(0);
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BuildMI(*MBB, IP, X86::NEG32r, 1, DestReg+1).addReg(T);
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}
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return;
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return;
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}
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}
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} else if (ConstantFP *CFP = dyn_cast<ConstantFP>(Op0))
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} else if (ConstantFP *CFP = dyn_cast<ConstantFP>(Op0))
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