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PowerPC: Fix for rldcl/rldicl/rldicr MC emission

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This patch fixes the rldcl/rldicl/rldicr instruction emission. The issue is
the MDForm_1 instruction defines the PowerISA MB field from 'rldicl'
with the name MBE, but RLDCL/RLDICL/RLDICR definition uses as 'MB'.

It end up by generatint the 'rldicl' enconding at 
'lib/Target/PowerPC/PPCGenMCCodeEmitter.inc' to use the fourth argument as the
third. The patch changes it by adjusting to use the fourth argument as
intended.

Fixes PR14180.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166770 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Adhemerval Zanella 2012-10-26 12:09:58 +00:00
parent 6f20194cdb
commit edf5e9a1d5
1 changed files with 6 additions and 6 deletions
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12
lib/Target/PowerPC/PPCInstr64Bit.td
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@ -494,16 +494,16 @@ def RLDIMI : MDForm_1<30, 3,
// Rotate instructions.
def RLDCL : MDForm_1<30, 0,
(outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB, u6imm:$MB),
"rldcl $rA, $rS, $rB, $MB", IntRotateD,
(outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB, u6imm:$MBE),
"rldcl $rA, $rS, $rB, $MBE", IntRotateD,
[]>, isPPC64;
def RLDICL : MDForm_1<30, 0,
(outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$MB),
"rldicl $rA, $rS, $SH, $MB", IntRotateDI,
(outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$MBE),
"rldicl $rA, $rS, $SH, $MBE", IntRotateDI,
[]>, isPPC64;
def RLDICR : MDForm_1<30, 1,
(outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$ME),
"rldicr $rA, $rS, $SH, $ME", IntRotateDI,
(outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$MBE),
"rldicr $rA, $rS, $SH, $MBE", IntRotateDI,
[]>, isPPC64;
def RLWINM8 : MForm_2<21,