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[stackprotector] Allow for copies from vreg -> vreg to be in a terminator sequence.
Sometimes a copy from a vreg -> vreg sneaks into the middle of a terminator sequence. It is safe to slice this into the stack protector success bb. This fixes PR16979. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191260 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Michael Gottesman
parent
17f013265f
commit
eed779ff68
@ -1165,13 +1165,33 @@ static bool MIIsInTerminatorSequence(const MachineInstr *MI) {
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// sequence, so we return true in that case.
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return MI->isDebugValue();
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// If we are not defining a register that is a physical register via a copy or
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// are defining a register via an implicit def, we have left the terminator
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// sequence.
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MachineInstr::const_mop_iterator OPI = MI->operands_begin();
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if (!OPI->isReg() || !OPI->isDef() ||
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// We have left the terminator sequence if we are not doing one of the
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// following:
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//
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// 1. Copying a vreg into a physical register.
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// 2. Copying a vreg into a vreg.
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// 3. Defining a register via an implicit def.
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// OPI should always be a register definition...
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MachineInstr::const_mop_iterator OPI = MI->operands_begin();
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if (!OPI->isReg() || !OPI->isDef())
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return false;
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// Defining any register via an implicit def is always ok.
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if (MI->isImplicitDef())
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return true;
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// Grab the copy source...
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MachineInstr::const_mop_iterator OPI2 = OPI;
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++OPI2;
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assert(OPI2 != MI->operands_end()
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&& "Should have a copy implying we should have 2 arguments.");
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// Make sure that the copy dest is not a vreg when the copy source is a
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// physical register.
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if (!OPI2->isReg() ||
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(!TargetRegisterInfo::isPhysicalRegister(OPI->getReg()) &&
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!MI->isImplicitDef()))
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TargetRegisterInfo::isPhysicalRegister(OPI2->getReg())))
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return false;
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return true;
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63
test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll
Normal file
63
test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll
Normal file
@ -0,0 +1,63 @@
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; RUN: llc -mtriple i386-unknown-freebsd10.0 -march=x86 --relocation-model=pic %s -o -
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
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target triple = "i386-unknown-freebsd10.0"
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@state = internal unnamed_addr global i32 0, align 4
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; Function Attrs: nounwind sspreq
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define void @set_state(i32 %s) #0 {
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entry:
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store i32 %s, i32* @state, align 4, !tbaa !0
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ret void
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}
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; Function Attrs: nounwind sspreq
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define void @zero_char(i8* nocapture %p) #0 {
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entry:
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store i8 0, i8* %p, align 1, !tbaa !1
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tail call void @g(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) #2
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ret void
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}
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declare void @g(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) #1
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; Function Attrs: nounwind sspreq
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define void @do_something(i32 %i) #0 {
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entry:
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%data = alloca [8 x i8], align 1
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%0 = load i32* @state, align 4, !tbaa !0
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%cmp = icmp eq i32 %0, 0
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br i1 %cmp, label %if.then, label %if.else
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if.then: ; preds = %entry
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tail call fastcc void @send_int(i32 0)
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br label %if.end
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if.else: ; preds = %entry
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tail call fastcc void @send_int(i32 %i)
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%arrayidx = getelementptr inbounds [8 x i8]* %data, i32 0, i32 0
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call void @zero_char(i8* %arrayidx)
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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ret void
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}
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; Function Attrs: nounwind sspreq
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define internal fastcc void @send_int(i32 %p) #0 {
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entry:
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tail call void @f(i32 %p) #2
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tail call void @g(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) #2
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ret void
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}
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declare void @f(i32) #1
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attributes #0 = { nounwind sspreq "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #2 = { nounwind }
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!0 = metadata !{metadata !"int", metadata !1}
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!1 = metadata !{metadata !"omnipotent char", metadata !2}
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!2 = metadata !{metadata !"Simple C/C++ TBAA"}
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