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REG_SEQUENCE expansion to COPY instructions wasn't taking account of sub register indices on the source registers. No simple test case

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154051 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Pete Cooper 2012-04-04 21:03:25 +00:00
parent e25a2bd2e3
commit ef74ca6a41
1 changed files with 2 additions and 1 deletions
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3
lib/CodeGen/TwoAddressInstructionPass.cpp
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@ -1832,6 +1832,7 @@ bool TwoAddressInstructionPass::EliminateRegSequences() {
SmallSet<unsigned, 4> Seen; SmallSet<unsigned, 4> Seen;
for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) { for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) {
unsigned SrcReg = MI->getOperand(i).getReg(); unsigned SrcReg = MI->getOperand(i).getReg();
unsigned SrcSubIdx = MI->getOperand(i).getSubReg();
unsigned SubIdx = MI->getOperand(i+1).getImm(); unsigned SubIdx = MI->getOperand(i+1).getImm();
// DefMI of NULL means the value does not have a vreg in this block // DefMI of NULL means the value does not have a vreg in this block
// i.e., its a physical register or a subreg. // i.e., its a physical register or a subreg.
@ -1887,7 +1888,7 @@ bool TwoAddressInstructionPass::EliminateRegSequences() {
MachineInstr *CopyMI = BuildMI(*MI->getParent(), InsertLoc, MachineInstr *CopyMI = BuildMI(*MI->getParent(), InsertLoc,
MI->getDebugLoc(), TII->get(TargetOpcode::COPY)) MI->getDebugLoc(), TII->get(TargetOpcode::COPY))
.addReg(DstReg, RegState::Define, SubIdx) .addReg(DstReg, RegState::Define, SubIdx)
.addReg(SrcReg, getKillRegState(isKill)); .addReg(SrcReg, getKillRegState(isKill), SrcSubIdx);
MI->getOperand(i).setReg(0); MI->getOperand(i).setReg(0);
if (LV && isKill && !TargetRegisterInfo::isPhysicalRegister(SrcReg)) if (LV && isKill && !TargetRegisterInfo::isPhysicalRegister(SrcReg))
LV->replaceKillInstruction(SrcReg, MI, CopyMI); LV->replaceKillInstruction(SrcReg, MI, CopyMI);