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AArch64: lower "fence singlethread" to a pure compiler barrier.

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Single-threaded fences aren't required to provide any synchronization with
other processing elements so there's no need for a DMB. They should still be a
barrier for compiler optimizations though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300905 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2017-04-20 21:57:45 +00:00
parent ff268972fc
commit efa8c0e73a
4 changed files with 14 additions and 0 deletions
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1
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
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@ -942,6 +942,7 @@ bool AArch64ExpandPseudo::expandMI(MachineBasicBlock &MBB,
AArch64::XZR, NextMBBI);
case AArch64::CMP_SWAP_128:
return expandCMP_SWAP_128(MBB, MBBI, NextMBBI);
}
return false;
}

3
lib/Target/AArch64/AArch64InstrAtomics.td
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@ -14,6 +14,9 @@
//===----------------------------------
// Atomic fences
//===----------------------------------
let AddedComplexity = 15, Size = 0 in
def CompilerBarrier : Pseudo<(outs), (ins i32imm:$ordering),
[(atomic_fence imm:$ordering, 0)]>, Sched<[]>;
def : Pat<(atomic_fence (i64 4), (imm)), (DMB (i32 0x9))>;
def : Pat<(atomic_fence (imm), (imm)), (DMB (i32 0xb))>;

7
lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
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@ -17,6 +17,7 @@
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCRegisterInfo.h"
@ -275,6 +276,12 @@ void AArch64InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
}
}
if (Opcode == AArch64::CompilerBarrier) {
O << '\t' << MAI.getCommentString() << " COMPILER BARRIER";
printAnnotation(O, Annot);
return;
}
if (!printAliasInstr(MI, STI, O))
printInstruction(MI, STI, O);

3
lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
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@ -565,6 +565,9 @@ void AArch64MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
MCFixupKind Fixup = MCFixupKind(AArch64::fixup_aarch64_tlsdesc_call);
Fixups.push_back(MCFixup::create(0, MI.getOperand(0).getExpr(), Fixup));
return;
} else if (MI.getOpcode() == AArch64::CompilerBarrier) {
// This just prevents the compiler from reordering accesses, no actual code.
return;
}
uint64_t Binary = getBinaryCodeForInstr(MI, Fixups, STI);