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Add new TargetRegisterClass::contains method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15783 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -65,6 +65,14 @@ public:
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return RegsBegin[i];
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}
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/// contains - Return true if the specified register is included in this
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/// register class.
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bool contains(unsigned Reg) const {
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for (iterator I = begin(), E = end(); I != E; ++I)
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if (*I == Reg) return true;
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return false;
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}
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/// allocation_order_begin/end - These methods define a range of registers
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/// which specify the registers in this class that are valid to register
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/// allocate, and the preferred order to allocate them in. For example,
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