mirror of
https://github.com/RPCSX/llvm.git
synced 2024-11-23 19:59:57 +00:00
Guard fabs to bfc convert with V6T2 flag
Summary: BFC instructions are available in ARMv6T2 and above. Reviewers: t.p.northover Subscribers: aemerson Differential Revision: http://reviews.llvm.org/D16076 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257546 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
dab10b3735
commit
f1f1b483b6
@ -930,10 +930,10 @@ def VMOVDRR : AVConv5I<0b11000100, 0b1011,
|
||||
// and could enable the conversion to float to be removed completely.
|
||||
def : Pat<(fabs (arm_fmdrr GPR:$Rl, GPR:$Rh)),
|
||||
(VMOVDRR GPR:$Rl, (BFC GPR:$Rh, (i32 0x7FFFFFFF)))>,
|
||||
Requires<[IsARM]>;
|
||||
Requires<[IsARM, HasV6T2]>;
|
||||
def : Pat<(fabs (arm_fmdrr GPR:$Rl, GPR:$Rh)),
|
||||
(VMOVDRR GPR:$Rl, (t2BFC GPR:$Rh, (i32 0x7FFFFFFF)))>,
|
||||
Requires<[IsThumb2]>;
|
||||
Requires<[IsThumb2, HasV6T2]>;
|
||||
def : Pat<(fneg (arm_fmdrr GPR:$Rl, GPR:$Rh)),
|
||||
(VMOVDRR GPR:$Rl, (EORri GPR:$Rh, (i32 0x80000000)))>,
|
||||
Requires<[IsARM]>;
|
||||
|
14
test/CodeGen/ARM/fabs-to-bfc.ll
Normal file
14
test/CodeGen/ARM/fabs-to-bfc.ll
Normal file
@ -0,0 +1,14 @@
|
||||
; RUN: llc < %s -mtriple=armv5e-none-linux-gnueabi -mattr=+vfp2 | FileCheck %s -check-prefix=CHECK-VABS
|
||||
; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+vfp3 | FileCheck %s -check-prefix=CHECK-BFC
|
||||
|
||||
|
||||
define double @test(double %tx) {
|
||||
;CHECK-LABEL: test:
|
||||
%call = tail call double @fabs(double %tx)
|
||||
ret double %call
|
||||
;CHECK-VABS: vabs.f64
|
||||
;CHECK-BFC: bfc
|
||||
}
|
||||
|
||||
declare double @fabs(double) readnone
|
||||
|
Loading…
Reference in New Issue
Block a user