RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2024-11-27 13:40:30 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Delete AArch64II::MO_CONSTPOOL.

Browse Source 
A constant pool holding the address of a variable in equivalent to
a got entry. It produces exactly the same instruction sequence as a
got use and unlike a got use this is not uniqued by the linker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271311 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2016-05-31 18:31:14 +00:00
parent cb4d52f619
commit f2b59e8119
7 changed files with 6 additions and 66 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
lib/Target/AArch64/AArch64FastISel.cpp
View File

@ -438,9 +438,6 @@ unsigned AArch64FastISel::materializeGV(const GlobalValue *GV) {
.addReg(ADRPReg)
.addGlobalAddress(GV, 0, AArch64II::MO_GOT | AArch64II::MO_PAGEOFF |
AArch64II::MO_NC);
} else if (OpFlags & AArch64II::MO_CONSTPOOL) {
// We can't handle addresses loaded from a constant pool quickly yet.
return 0;
} else {
// ADRP + ADDX
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),

20
lib/Target/AArch64/AArch64ISelLowering.cpp
View File

@ -3418,26 +3418,6 @@ SDValue AArch64TargetLowering::LowerGlobalAddress(SDValue Op,
return DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, GotAddr);
}
if ((OpFlags & AArch64II::MO_CONSTPOOL) != 0) {
assert(getTargetMachine().getCodeModel() == CodeModel::Small &&
"use of MO_CONSTPOOL only supported on small model");
SDValue Hi = DAG.getTargetConstantPool(GV, PtrVT, 0, 0, AArch64II::MO_PAGE);
SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi);
unsigned char LoFlags = AArch64II::MO_PAGEOFF | AArch64II::MO_NC;
SDValue Lo = DAG.getTargetConstantPool(GV, PtrVT, 0, 0, LoFlags);
SDValue PoolAddr = DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo);
SDValue GlobalAddr = DAG.getLoad(
PtrVT, DL, DAG.getEntryNode(), PoolAddr,
MachinePointerInfo::getConstantPool(DAG.getMachineFunction()),
/*isVolatile=*/false,
/*isNonTemporal=*/true,
/*isInvariant=*/true, 8);
if (GN->getOffset() != 0)
return DAG.getNode(ISD::ADD, DL, PtrVT, GlobalAddr,
DAG.getConstant(GN->getOffset(), DL, PtrVT));
return GlobalAddr;
}
if (getTargetMachine().getCodeModel() == CodeModel::Large) {
const unsigned char MO_NC = AArch64II::MO_NC;
return DAG.getNode(

3
lib/Target/AArch64/AArch64InstrInfo.cpp
View File

@ -3992,7 +3992,6 @@ AArch64InstrInfo::getSerializableBitmaskMachineOperandTargetFlags() const {
static const std::pair<unsigned, const char *> TargetFlags[] = {
{MO_GOT, "aarch64-got"},
{MO_NC, "aarch64-nc"},
{MO_TLS, "aarch64-tls"},
{MO_CONSTPOOL, "aarch64-constant-pool"}};
{MO_TLS, "aarch64-tls"}};
return makeArrayRef(TargetFlags);
}

9
lib/Target/AArch64/AArch64Subtarget.cpp
View File

@ -81,13 +81,8 @@ AArch64Subtarget::ClassifyGlobalReference(const GlobalValue *GV,
// The small code mode's direct accesses use ADRP, which cannot necessarily
// produce the value 0 (if the code is above 4GB).
if (TM.getCodeModel() == CodeModel::Small && GV->hasExternalWeakLinkage()) {
// In PIC mode use the GOT, but in absolute mode use a constant pool load.
if (RM == Reloc::Static)
return AArch64II::MO_CONSTPOOL;
else
return AArch64II::MO_GOT;
}
if (TM.getCodeModel() == CodeModel::Small && GV->hasExternalWeakLinkage())
return AArch64II::MO_GOT;
return AArch64II::MO_NO_FLAG;
}

7
lib/Target/AArch64/Utils/AArch64BaseInfo.h
View File

@ -1379,12 +1379,7 @@ namespace AArch64II {
/// thread-local symbol. On Darwin, only one type of thread-local access
/// exists (pre linker-relaxation), but on ELF the TLSModel used for the
/// referee will affect interpretation.
MO_TLS = 0x40,
/// MO_CONSTPOOL - This flag indicates that a symbol operand represents
/// the address of a constant pool entry for the symbol, rather than the
/// address of the symbol itself.
MO_CONSTPOOL = 0x80
MO_TLS = 0x40
};
} // end namespace AArch64II

15
test/CodeGen/AArch64/arm64-extern-weak.ll
View File

@ -1,5 +1,5 @@
; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -o - < %s | FileCheck %s
; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=static -o - < %s | FileCheck --check-prefix=CHECK-STATIC %s
; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=static -o - < %s | FileCheck --check-prefix=CHECK %s
; RUN: llc -mtriple=arm64-none-linux-gnu -code-model=large -o - < %s | FileCheck --check-prefix=CHECK-LARGE %s
declare extern_weak i32 @var()
@ -13,11 +13,6 @@ define i32()* @foo() {
; CHECK: adrp x[[VAR:[0-9]+]], :got:var
; CHECK: ldr x0, [x[[VAR]], :got_lo12:var]
; CHECK-STATIC: .LCPI0_0:
; CHECK-STATIC-NEXT: .xword var
; CHECK-STATIC: adrp x[[VAR:[0-9]+]], .LCPI0_0
; CHECK-STATIC: ldr x0, [x[[VAR]], :lo12:.LCPI0_0]
; In the large model, the usual relocations are absolute and can
; materialise 0.
; CHECK-LARGE: movz x0, #:abs_g3:var
@ -36,11 +31,6 @@ define i32* @bar() {
; CHECK: add x0, [[ARR_VAR]], #20
ret i32* %addr
; CHECK-STATIC: .LCPI1_0:
; CHECK-STATIC-NEXT: .xword arr_var
; CHECK-STATIC: ldr [[BASE:x[0-9]+]], [{{x[0-9]+}}, :lo12:.LCPI1_0]
; CHECK-STATIC: add x0, [[BASE]], #20
; In the large model, the usual relocations are absolute and can
; materialise 0.
; CHECK-LARGE: movz [[ARR_VAR:x[0-9]+]], #:abs_g3:arr_var
@ -56,9 +46,6 @@ define i32* @wibble() {
; CHECK: adrp [[BASE:x[0-9]+]], defined_weak_var
; CHECK: add x0, [[BASE]], :lo12:defined_weak_var
; CHECK-STATIC: adrp [[BASE:x[0-9]+]], defined_weak_var
; CHECK-STATIC: add x0, [[BASE]], :lo12:defined_weak_var
; CHECK-LARGE: movz x0, #:abs_g3:defined_weak_var
; CHECK-LARGE: movk x0, #:abs_g2_nc:defined_weak_var
; CHECK-LARGE: movk x0, #:abs_g1_nc:defined_weak_var

15
test/CodeGen/AArch64/extern-weak.ll
View File

@ -1,5 +1,5 @@
; RUN: llc -mtriple=aarch64-none-linux-gnu -relocation-model=pic -o - %s | FileCheck %s
; RUN: llc -mtriple=aarch64-none-linux-gnu -relocation-model=static -o - < %s | FileCheck --check-prefix=CHECK-STATIC %s
; RUN: llc -mtriple=aarch64-none-linux-gnu -relocation-model=static -o - < %s | FileCheck --check-prefix=CHECK %s
; RUN: llc -mtriple=aarch64-none-linux-gnu -code-model=large -o - %s | FileCheck --check-prefix=CHECK-LARGE %s
declare extern_weak i32 @var()
@ -14,11 +14,6 @@ define i32()* @foo() {
; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:var
; CHECK: ldr x0, [x[[ADDRHI]], :got_lo12:var]
; CHECK-STATIC: .LCPI0_0:
; CHECK-STATIC-NEXT: .xword var
; CHECK-STATIC: adrp x[[VAR:[0-9]+]], .LCPI0_0
; CHECK-STATIC: ldr x0, [x[[VAR]], :lo12:.LCPI0_0]
; In the large model, the usual relocations are absolute and can
; materialise 0.
; CHECK-LARGE: movz x0, #:abs_g3:var
@ -38,11 +33,6 @@ define i32* @bar() {
; CHECK: ldr [[BASE:x[0-9]+]], [x[[ADDRHI]], :got_lo12:arr_var]
; CHECK: add x0, [[BASE]], #20
; CHECK-STATIC: .LCPI1_0:
; CHECK-STATIC-NEXT: .xword arr_var
; CHECK-STATIC: ldr [[BASE:x[0-9]+]], [{{x[0-9]+}}, :lo12:.LCPI1_0]
; CHECK-STATIC: add x0, [[BASE]], #20
ret i32* %addr
; In the large model, the usual relocations are absolute and can
@ -61,9 +51,6 @@ define i32* @wibble() {
; CHECK: adrp [[BASE:x[0-9]+]], defined_weak_var
; CHECK: add x0, [[BASE]], :lo12:defined_weak_var
; CHECK-STATIC: adrp [[BASE:x[0-9]+]], defined_weak_var
; CHECK-STATIC: add x0, [[BASE]], :lo12:defined_weak_var
; CHECK-LARGE: movz x0, #:abs_g3:defined_weak_var
; CHECK-LARGE: movk x0, #:abs_g2_nc:defined_weak_var
; CHECK-LARGE: movk x0, #:abs_g1_nc:defined_weak_var