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2 fixes:

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1: Legalize operand in UINT_TO_FP expanision

2: SRA x, const i8 was not promoting the constant to shift amount type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22337 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-07-05 19:52:39 +00:00
parent 08568cfe25
commit f2eb1396b8
1 changed files with 13 additions and 4 deletions
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17
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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@ -1100,7 +1100,15 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
case ISD::SRL:
case ISD::SRA:
Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS
Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS
switch (getTypeAction(Node->getOperand(1).getValueType())) {
case Expand: assert(0 && "Not possible");
case Legal:
Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the RHS.
break;
case Promote:
Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the RHS.
break;
}
if (Tmp1 != Node->getOperand(0) ||
Tmp2 != Node->getOperand(1))
Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,Tmp2);
@ -1327,13 +1335,14 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
TLI.getOperationAction(Node->getOpcode(),
Node->getOperand(0).getValueType())
== TargetLowering::Expand) {
SDOperand Op0 = LegalizeOp(Node->getOperand(0));
Tmp1 = DAG.getNode(ISD::SINT_TO_FP, Node->getValueType(0),
Node->getOperand(0));
Op0);
SDOperand SignSet = DAG.getSetCC(ISD::SETLT, TLI.getSetCCResultTy(),
Node->getOperand(0),
Op0,
DAG.getConstant(0,
Node->getOperand(0).getValueType()));
Op0.getValueType()));
SDOperand Zero = getIntPtrConstant(0), Four = getIntPtrConstant(4);
SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(),
SignSet, Four, Zero);