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Add TargetInstrInfo interface isAsCheapAsAMove.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214158 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -614,7 +614,6 @@ public:
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/// are not marking copies from and to the same register class with this flag.
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bool isAsCheapAsAMove(QueryType Type = AllInBundle) const {
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// Only returns true for a bundle if all bundled instructions are cheap.
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// FIXME: This probably requires a target hook.
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return hasProperty(MCID::CheapAsAMove, Type);
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}
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@ -451,9 +451,12 @@ public:
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}
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/// isRematerializable - Returns true if this instruction is a candidate for
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/// remat. This flag is deprecated, please don't use it anymore. If this
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/// flag is set, the isReallyTriviallyReMaterializable() method is called to
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/// verify the instruction is really rematable.
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/// remat. This flag is only used in TargetInstrInfo method
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/// isTriviallyRematerializable.
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///
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/// If this flag is set, the isReallyTriviallyReMaterializable()
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/// or isReallyTriviallyReMaterializableGeneric methods are called to verify
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/// the instruction is really rematable.
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bool isRematerializable() const {
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return Flags & (1 << MCID::Rematerializable);
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}
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@ -464,6 +467,9 @@ public:
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/// where we would like to remat or hoist the instruction, but not if it costs
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/// more than moving the instruction into the appropriate register. Note, we
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/// are not marking copies from and to the same register class with this flag.
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///
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/// This method could be called by interface TargetInstrInfo::isAsCheapAsAMove
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/// for different subtargets.
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bool isAsCheapAsAMove() const {
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return Flags & (1 << MCID::CheapAsAMove);
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}
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@ -200,6 +200,15 @@ public:
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unsigned &Size, unsigned &Offset,
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const TargetMachine *TM) const;
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/// isAsCheapAsAMove - Return true if the instruction is as cheap as a move
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/// instruction.
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///
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/// Targets for different archs need to override this, and different
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/// micro-architectures can also be finely tuned inside.
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virtual bool isAsCheapAsAMove(const MachineInstr *MI) const {
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return MI->isAsCheapAsAMove();
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}
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/// reMaterialize - Re-issue the specified 'original' instruction at the
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/// specific location targeting a new destination register.
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/// The register in Orig->getOperand(0).getReg() will be substituted by
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@ -135,7 +135,7 @@ bool LiveRangeEdit::canRematerializeAt(Remat &RM,
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}
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// If only cheap remats were requested, bail out early.
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if (cheapAsAMove && !RM.OrigMI->isAsCheapAsAMove())
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if (cheapAsAMove && !TII.isAsCheapAsAMove(RM.OrigMI))
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return false;
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// Verify that all used registers are available with the same values.
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@ -380,7 +380,7 @@ bool MachineCSE::isProfitableToCSE(unsigned CSReg, unsigned Reg,
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// Heuristics #1: Don't CSE "cheap" computation if the def is not local or in
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// an immediate predecessor. We don't want to increase register pressure and
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// end up causing other computation to be spilled.
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if (MI->isAsCheapAsAMove()) {
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if (TII->isAsCheapAsAMove(MI)) {
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MachineBasicBlock *CSBB = CSMI->getParent();
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MachineBasicBlock *BB = MI->getParent();
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if (CSBB != BB && !CSBB->isSuccessor(BB))
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@ -1039,7 +1039,7 @@ bool MachineLICM::HasHighOperandLatency(MachineInstr &MI,
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/// IsCheapInstruction - Return true if the instruction is marked "cheap" or
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/// the operand latency between its def and a use is one or less.
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bool MachineLICM::IsCheapInstruction(MachineInstr &MI) const {
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if (MI.isAsCheapAsAMove() || MI.isCopyLike())
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if (TII->isAsCheapAsAMove(&MI) || MI.isCopyLike())
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return true;
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if (!InstrItins || InstrItins->isEmpty())
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return false;
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@ -292,7 +292,7 @@ bool MachineSinking::isWorthBreakingCriticalEdge(MachineInstr *MI,
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if (!CEBCandidates.insert(std::make_pair(From, To)))
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return true;
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if (!MI->isCopy() && !MI->isAsCheapAsAMove())
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if (!MI->isCopy() && !TII->isAsCheapAsAMove(MI))
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return true;
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// MI is cheap, we probably don't want to break the critical edge for it.
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@ -751,7 +751,7 @@ bool RegisterCoalescer::reMaterializeTrivialDef(CoalescerPair &CP,
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IsDefCopy = true;
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return false;
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}
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if (!DefMI->isAsCheapAsAMove())
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if (!TII->isAsCheapAsAMove(DefMI))
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return false;
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if (!TII->isTriviallyReMaterializable(DefMI, AA))
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return false;
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