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DAGCombiner: Allow negating ConstantFP after legalize

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293019 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2017-01-25 04:54:34 +00:00
parent 6109735ddc
commit f337952e56
4 changed files with 39 additions and 6 deletions
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6
include/llvm/ADT/APFloat.h
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@ -1313,6 +1313,12 @@ inline APFloat abs(APFloat X) {
return X;
}
/// \brief Returns the negated value of the argument.
inline APFloat neg(APFloat X) {
X.changeSign();
return X;
}
/// Implements IEEE minNum semantics. Returns the smaller of the 2 arguments if
/// both are not NaN. If either argument is a NaN, returns the other argument.
LLVM_READONLY

14
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -607,10 +607,16 @@ static char isNegatibleForFree(SDValue Op, bool LegalOperations,
switch (Op.getOpcode()) {
default: return false;
case ISD::ConstantFP:
// Don't invert constant FP values after legalize. The negated constant
// isn't necessarily legal.
return LegalOperations ? 0 : 1;
case ISD::ConstantFP: {
if (!LegalOperations)
return 1;
// Don't invert constant FP values after legalization unless the target says
// the negated constant is legal.
EVT VT = Op.getValueType();
return TLI.isOperationLegal(ISD::ConstantFP, VT) ||
TLI.isFPImmLegal(neg(cast<ConstantFPSDNode>(Op)->getValueAPF()), VT);
}
case ISD::FADD:
// FIXME: determine better conditions for this xform.
if (!Options->UnsafeFPMath) return 0;

3
test/CodeGen/AMDGPU/fneg-combines.ll
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@ -1300,8 +1300,7 @@ define void @v_fneg_mul_legacy_multi_use_fneg_x_f32(float addrspace(1)* %out, fl
; GCN-LABEL: {{^}}v_fneg_sin_f32:
; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]]
; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0x3e22f983
; GCN: v_mul_f32_e64 [[MUL:v[0-9]+]], [[K]], -[[A]]
; GCN: v_mul_f32_e32 [[MUL:v[0-9]+]], 0xbe22f983, [[A]]
; GCN: v_fract_f32_e32 [[FRACT:v[0-9]+]], [[MUL]]
; GCN: v_sin_f32_e32 [[RESULT:v[0-9]+]], [[FRACT]]
; GCN: buffer_store_dword [[RESULT]]

22
unittests/ADT/APFloatTest.cpp
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@ -2830,6 +2830,28 @@ TEST(APFloatTest, abs) {
EXPECT_TRUE(PSmallestNormalized.bitwiseIsEqual(abs(MSmallestNormalized)));
}
TEST(APFloatTest, neg) {
APFloat One = APFloat(APFloat::IEEEsingle(), "1.0");
APFloat NegOne = APFloat(APFloat::IEEEsingle(), "-1.0");
APFloat Zero = APFloat::getZero(APFloat::IEEEsingle(), false);
APFloat NegZero = APFloat::getZero(APFloat::IEEEsingle(), true);
APFloat Inf = APFloat::getInf(APFloat::IEEEsingle(), false);
APFloat NegInf = APFloat::getInf(APFloat::IEEEsingle(), true);
APFloat QNaN = APFloat::getNaN(APFloat::IEEEsingle(), false);
APFloat NegQNaN = APFloat::getNaN(APFloat::IEEEsingle(), true);
EXPECT_TRUE(NegOne.bitwiseIsEqual(neg(One)));
EXPECT_TRUE(One.bitwiseIsEqual(neg(NegOne)));
EXPECT_TRUE(NegZero.bitwiseIsEqual(neg(Zero)));
EXPECT_TRUE(Zero.bitwiseIsEqual(neg(NegZero)));
EXPECT_TRUE(NegInf.bitwiseIsEqual(neg(Inf)));
EXPECT_TRUE(Inf.bitwiseIsEqual(neg(NegInf)));
EXPECT_TRUE(NegInf.bitwiseIsEqual(neg(Inf)));
EXPECT_TRUE(Inf.bitwiseIsEqual(neg(NegInf)));
EXPECT_TRUE(NegQNaN.bitwiseIsEqual(neg(QNaN)));
EXPECT_TRUE(QNaN.bitwiseIsEqual(neg(NegQNaN)));
}
TEST(APFloatTest, ilogb) {
EXPECT_EQ(-1074, ilogb(APFloat::getSmallest(APFloat::IEEEdouble(), false)));
EXPECT_EQ(-1074, ilogb(APFloat::getSmallest(APFloat::IEEEdouble(), true)));