Change all #include'd files to be :: rules instead of : rules

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8019 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2003-08-21 20:37:17 +00:00
parent b1c125e2cd
commit f3526e2207
2 changed files with 7 additions and 7 deletions

View File

@ -48,7 +48,7 @@ TARGET_NAME := SparcV9
TABLEGEN_FILES := $(wildcard *.td)
$(TARGET_NAME)CodeEmitter.inc: $(TABLEGEN_FILES) $(TBLGEN)
$(TARGET_NAME)CodeEmitter.inc:: $(TABLEGEN_FILES) $(TBLGEN)
$(TBLGEN) $(TARGET_NAME).td -gen-emitter -o $@
clean::

View File

@ -7,22 +7,22 @@ $(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
X86GenRegisterInfo.inc X86GenInstrNames.inc \
X86GenInstrInfo.inc X86GenInstrSelector.inc
X86GenRegisterNames.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
X86GenRegisterNames.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
$(TBLGEN) $< -gen-register-enums -o $@
X86GenRegisterInfo.h.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
X86GenRegisterInfo.h.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
$(TBLGEN) $< -gen-register-desc-header -o $@
X86GenRegisterInfo.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
X86GenRegisterInfo.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
$(TBLGEN) $< -gen-register-desc -o $@
X86GenInstrNames.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
X86GenInstrNames.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
$(TBLGEN) $< -gen-instr-enums -o $@
X86GenInstrInfo.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
X86GenInstrInfo.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
$(TBLGEN) $< -gen-instr-desc -o $@
X86GenInstrSelector.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
X86GenInstrSelector.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
$(TBLGEN) $< -gen-instr-selector -o $@
clean::