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[AVX-512] Fix the execution domain for AVX-512 integer broadcasts.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296290 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2017-02-26 06:45:51 +00:00
parent b64325c5da
commit f46e01bb23
3 changed files with 6 additions and 5 deletions
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1
lib/Target/X86/X86InstrAVX512.td
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@ -965,6 +965,7 @@ def : Pat<(int_x86_avx512_vbroadcast_sd_512 addr:$src),
multiclass avx512_int_broadcast_reg<bits<8> opc, X86VectorVTInfo _, multiclass avx512_int_broadcast_reg<bits<8> opc, X86VectorVTInfo _,
SDPatternOperator OpNode, SDPatternOperator OpNode,
RegisterClass SrcRC> { RegisterClass SrcRC> {
let ExeDomain = _.ExeDomain in
defm r : AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst), defm r : AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
(ins SrcRC:$src), (ins SrcRC:$src),
"vpbroadcast"##_.Suffix, "$src", "$src", "vpbroadcast"##_.Suffix, "$src", "$src",

8
test/CodeGen/X86/avx2-vbroadcast.ll
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@ -1419,7 +1419,7 @@ define void @isel_crash_4d(i32* %cV_R.addr) {
; X64-AVX512VL-NEXT: movl (%rdi), %eax ; X64-AVX512VL-NEXT: movl (%rdi), %eax
; X64-AVX512VL-NEXT: vpbroadcastd %eax, %xmm1 ; X64-AVX512VL-NEXT: vpbroadcastd %eax, %xmm1
; X64-AVX512VL-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp) ; X64-AVX512VL-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
; X64-AVX512VL-NEXT: vmovaps %xmm1, -{{[0-9]+}}(%rsp) ; X64-AVX512VL-NEXT: vmovdqa %xmm1, -{{[0-9]+}}(%rsp)
; X64-AVX512VL-NEXT: retq ; X64-AVX512VL-NEXT: retq
entry: entry:
%__a.addr.i = alloca <2 x i64>, align 16 %__a.addr.i = alloca <2 x i64>, align 16
@ -1523,7 +1523,7 @@ define void @isel_crash_8d(i32* %cV_R.addr) {
; X64-AVX512VL-NEXT: movl (%rdi), %eax ; X64-AVX512VL-NEXT: movl (%rdi), %eax
; X64-AVX512VL-NEXT: vpbroadcastd %eax, %ymm1 ; X64-AVX512VL-NEXT: vpbroadcastd %eax, %ymm1
; X64-AVX512VL-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp) ; X64-AVX512VL-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp)
; X64-AVX512VL-NEXT: vmovaps %ymm1, {{[0-9]+}}(%rsp) ; X64-AVX512VL-NEXT: vmovdqa %ymm1, {{[0-9]+}}(%rsp)
; X64-AVX512VL-NEXT: movq %rbp, %rsp ; X64-AVX512VL-NEXT: movq %rbp, %rsp
; X64-AVX512VL-NEXT: popq %rbp ; X64-AVX512VL-NEXT: popq %rbp
; X64-AVX512VL-NEXT: retq ; X64-AVX512VL-NEXT: retq
@ -1580,7 +1580,7 @@ define void @isel_crash_2q(i64* %cV_R.addr) {
; X64-AVX512VL-NEXT: movq (%rdi), %rax ; X64-AVX512VL-NEXT: movq (%rdi), %rax
; X64-AVX512VL-NEXT: vpbroadcastq %rax, %xmm1 ; X64-AVX512VL-NEXT: vpbroadcastq %rax, %xmm1
; X64-AVX512VL-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp) ; X64-AVX512VL-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
; X64-AVX512VL-NEXT: vmovaps %xmm1, -{{[0-9]+}}(%rsp) ; X64-AVX512VL-NEXT: vmovdqa %xmm1, -{{[0-9]+}}(%rsp)
; X64-AVX512VL-NEXT: retq ; X64-AVX512VL-NEXT: retq
entry: entry:
%__a.addr.i = alloca <2 x i64>, align 16 %__a.addr.i = alloca <2 x i64>, align 16
@ -1695,7 +1695,7 @@ define void @isel_crash_4q(i64* %cV_R.addr) {
; X64-AVX512VL-NEXT: movq (%rdi), %rax ; X64-AVX512VL-NEXT: movq (%rdi), %rax
; X64-AVX512VL-NEXT: vpbroadcastq %rax, %ymm1 ; X64-AVX512VL-NEXT: vpbroadcastq %rax, %ymm1
; X64-AVX512VL-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp) ; X64-AVX512VL-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp)
; X64-AVX512VL-NEXT: vmovaps %ymm1, {{[0-9]+}}(%rsp) ; X64-AVX512VL-NEXT: vmovdqa %ymm1, {{[0-9]+}}(%rsp)
; X64-AVX512VL-NEXT: movq %rbp, %rsp ; X64-AVX512VL-NEXT: movq %rbp, %rsp
; X64-AVX512VL-NEXT: popq %rbp ; X64-AVX512VL-NEXT: popq %rbp
; X64-AVX512VL-NEXT: retq ; X64-AVX512VL-NEXT: retq

2
test/Transforms/LoopVectorize/X86/avx512.ll
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@ -7,7 +7,7 @@ target triple = "x86_64-apple-macosx10.9.0"
; loop. ; loop.
; CHECK-LABEL: f: ; CHECK-LABEL: f:
; CHECK: vmovups %zmm{{.}}, ; CHECK: vmovdqu32 %zmm{{.}},
; CHECK-NOT: %ymm ; CHECK-NOT: %ymm
define void @f(i32* %a, i32 %n) { define void @f(i32* %a, i32 %n) {