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Correct the setting of Def flags on registers that are modified!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5065 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -56,8 +56,8 @@ X86RegisterInfo::loadRegOffset2Reg(MachineBasicBlock &MBB,
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const
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{
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static const unsigned Opcode[] = { X86::MOVmr8, X86::MOVmr16, X86::MOVmr32 };
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MachineInstr *MI = addRegOffset(BuildMI(Opcode[getIdx(dataSize)], 5)
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.addReg(DestReg), SrcReg, ImmOffset);
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MachineInstr *MI = addRegOffset(BuildMI(Opcode[getIdx(dataSize)], 4, DestReg),
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SrcReg, ImmOffset);
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return ++MBB.insert(MBBI, MI);
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}
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@ -68,8 +68,7 @@ X86RegisterInfo::moveReg2Reg(MachineBasicBlock &MBB,
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unsigned dataSize) const
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{
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static const unsigned Opcode[] = { X86::MOVrr8, X86::MOVrr16, X86::MOVrr32 };
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MachineInstr *MI =
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BuildMI(Opcode[getIdx(dataSize)], 2).addReg(DestReg).addReg(SrcReg);
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MachineInstr *MI = BuildMI(Opcode[getIdx(dataSize)],1,DestReg).addReg(SrcReg);
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return ++MBB.insert(MBBI, MI);
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}
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@ -80,8 +79,7 @@ X86RegisterInfo::moveImm2Reg(MachineBasicBlock &MBB,
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const
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{
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static const unsigned Opcode[] = { X86::MOVir8, X86::MOVir16, X86::MOVir32 };
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MachineInstr *MI =
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BuildMI(Opcode[getIdx(dataSize)], 2).addReg(DestReg).addReg(Imm);
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MachineInstr *MI = BuildMI(Opcode[getIdx(dataSize)], 1, DestReg).addReg(Imm);
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return ++MBB.insert(MBBI, MI);
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}
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@ -113,15 +111,15 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF,
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MachineBasicBlock::iterator MBBI = MBB.begin();
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// PUSH ebp
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MachineInstr *MI = BuildMI (X86::PUSHr32, 1).addReg(X86::EBP);
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MachineInstr *MI = BuildMI(X86::PUSHr32, 1).addReg(X86::EBP);
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MBBI = ++MBB.insert(MBBI, MI);
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// MOV ebp, esp
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MI = BuildMI (X86::MOVrr32, 2).addReg(X86::EBP).addReg(X86::ESP);
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MI = BuildMI(X86::MOVrr32, 1, X86::EBP).addReg(X86::ESP);
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MBBI = ++MBB.insert(MBBI, MI);
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// adjust stack pointer
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MI = BuildMI(X86::SUBri32, 2).addReg(X86::ESP).addZImm(numBytes);
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// adjust stack pointer: ESP -= numbytes
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MI = BuildMI(X86::SUBri32, 2, X86::ESP).addReg(X86::ESP).addZImm(numBytes);
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MBBI = ++MBB.insert(MBBI, MI);
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// PUSH all callee-save registers
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@ -144,7 +142,7 @@ void X86RegisterInfo::emitEpilogue(MachineBasicBlock &MBB,
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MRegisterInfo::NoRegister };
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unsigned idx = 0;
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while (regs[idx]) {
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MachineInstr *MI = BuildMI(X86::POPr32, 1).addReg(regs[idx++]);
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MachineInstr *MI = BuildMI(X86::POPr32, 0, regs[idx++]);
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MBBI = ++(MBB.insert(MBBI, MI));
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}
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