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CodeGen support for aggregate-value function arguments.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52156 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2008-06-09 21:19:23 +00:00
parent 98301c0774
commit f5025cfa68
1 changed files with 129 additions and 102 deletions
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45
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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@ -4573,10 +4573,15 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
unsigned j = 1; unsigned j = 1;
for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end();
I != E; ++I, ++j) { I != E; ++I, ++j) {
MVT VT = getValueType(I->getType()); SmallVector<MVT, 4> ValueVTs;
ComputeValueVTs(*this, I->getType(), ValueVTs);
for (unsigned Value = 0, NumValues = ValueVTs.size();
Value != NumValues; ++Value) {
MVT VT = ValueVTs[Value];
const Type *ArgTy = VT.getTypeForMVT();
ISD::ArgFlagsTy Flags; ISD::ArgFlagsTy Flags;
unsigned OriginalAlignment = unsigned OriginalAlignment =
getTargetData()->getABITypeAlignment(I->getType()); getTargetData()->getABITypeAlignment(ArgTy);
if (F.paramHasAttr(j, ParamAttr::ZExt)) if (F.paramHasAttr(j, ParamAttr::ZExt))
Flags.setZExt(); Flags.setZExt();
@ -4616,6 +4621,7 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
Ops.push_back(DAG.getArgFlags(MyFlags)); Ops.push_back(DAG.getArgFlags(MyFlags));
} }
} }
}
RetVals.push_back(MVT::Other); RetVals.push_back(MVT::Other);
@ -4646,7 +4652,11 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
unsigned Idx = 1; unsigned Idx = 1;
for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E;
++I, ++Idx) { ++I, ++Idx) {
MVT VT = getValueType(I->getType()); SmallVector<MVT, 4> ValueVTs;
ComputeValueVTs(*this, I->getType(), ValueVTs);
for (unsigned Value = 0, NumValues = ValueVTs.size();
Value != NumValues; ++Value) {
MVT VT = ValueVTs[Value];
MVT PartVT = getRegisterType(VT); MVT PartVT = getRegisterType(VT);
unsigned NumParts = getNumRegisters(VT); unsigned NumParts = getNumRegisters(VT);
@ -4663,6 +4673,7 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
Ops.push_back(getCopyFromParts(DAG, &Parts[0], NumParts, PartVT, VT, Ops.push_back(getCopyFromParts(DAG, &Parts[0], NumParts, PartVT, VT,
AssertOp)); AssertOp));
} }
}
assert(i == NumArgRegs && "Argument register count mismatch!"); assert(i == NumArgRegs && "Argument register count mismatch!");
return Ops; return Ops;
} }
@ -4687,11 +4698,16 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
// Handle all of the outgoing arguments. // Handle all of the outgoing arguments.
for (unsigned i = 0, e = Args.size(); i != e; ++i) { for (unsigned i = 0, e = Args.size(); i != e; ++i) {
MVT VT = getValueType(Args[i].Ty); SmallVector<MVT, 4> ValueVTs;
SDOperand Op = Args[i].Node; ComputeValueVTs(*this, Args[i].Ty, ValueVTs);
for (unsigned Value = 0, NumValues = ValueVTs.size();
Value != NumValues; ++Value) {
MVT VT = ValueVTs[Value];
const Type *ArgTy = VT.getTypeForMVT();
SDOperand Op = SDOperand(Args[i].Node.Val, Args[i].Node.ResNo + Value);
ISD::ArgFlagsTy Flags; ISD::ArgFlagsTy Flags;
unsigned OriginalAlignment = unsigned OriginalAlignment =
getTargetData()->getABITypeAlignment(Args[i].Ty); getTargetData()->getABITypeAlignment(ArgTy);
if (Args[i].isZExt) if (Args[i].isZExt)
Flags.setZExt(); Flags.setZExt();
@ -4742,6 +4758,7 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
Ops.push_back(DAG.getArgFlags(MyFlags)); Ops.push_back(DAG.getArgFlags(MyFlags));
} }
} }
}
// Figure out the result value types. We start by making a list of // Figure out the result value types. We start by making a list of
// the potentially illegal return value types. // the potentially illegal return value types.
@ -4888,10 +4905,18 @@ LowerArguments(BasicBlock *LLVMBB, SelectionDAGLowering &SDL) {
unsigned a = 0; unsigned a = 0;
for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end(); for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end();
AI != E; ++AI, ++a) AI != E; ++AI) {
SmallVector<MVT, 4> ValueVTs;
ComputeValueVTs(TLI, AI->getType(), ValueVTs);
unsigned NumValues = ValueVTs.size();
if (!AI->use_empty()) { if (!AI->use_empty()) {
SDL.setValue(AI, Args[a]); SmallVector<MVT, 4> LegalValueVTs(NumValues);
for (unsigned VI = 0; VI != NumValues; ++VI)
LegalValueVTs[VI] = Args[a + VI].getValueType();
SDL.setValue(AI, SDL.DAG.getNode(ISD::MERGE_VALUES,
SDL.DAG.getVTList(&LegalValueVTs[0],
NumValues),
&Args[a], NumValues));
// If this argument is live outside of the entry block, insert a copy from // If this argument is live outside of the entry block, insert a copy from
// whereever we got it to the vreg that other BB's will reference it as. // whereever we got it to the vreg that other BB's will reference it as.
DenseMap<const Value*, unsigned>::iterator VMI=FuncInfo.ValueMap.find(AI); DenseMap<const Value*, unsigned>::iterator VMI=FuncInfo.ValueMap.find(AI);
@ -4899,6 +4924,8 @@ LowerArguments(BasicBlock *LLVMBB, SelectionDAGLowering &SDL) {
SDL.CopyValueToVirtualRegister(AI, VMI->second); SDL.CopyValueToVirtualRegister(AI, VMI->second);
} }
} }
a += NumValues;
}
// Finally, if the target has anything special to do, allow it to do so. // Finally, if the target has anything special to do, allow it to do so.
// FIXME: this should insert code into the DAG! // FIXME: this should insert code into the DAG!