mirror of
https://github.com/RPCSX/llvm.git
synced 2024-11-25 12:50:00 +00:00
PTX: Various stylistic and code readability changes recommended by Jim Grosbach.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140855 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
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8c1dac54f2
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@ -69,14 +69,15 @@ void PTXInstPrinter::printPredicate(const MCInst *MI, raw_ostream &O) {
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}
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int PredOp = MI->getOperand(OpIndex).getImm();
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if (PredOp != PTX::PRED_NONE) {
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if (PredOp == PTX::PRED_NEGATE) {
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O << '!';
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} else {
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O << '@';
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}
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printOperand(MI, RegIndex, O);
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}
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if (PredOp == PTXPredicate::None)
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return;
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if (PredOp == PTXPredicate::Negate)
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O << '!';
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else
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O << '@';
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printOperand(MI, RegIndex, O);
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}
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void PTXInstPrinter::printCall(const MCInst *MI, raw_ostream &O) {
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@ -84,29 +85,27 @@ void PTXInstPrinter::printCall(const MCInst *MI, raw_ostream &O) {
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// The first two operands are the predicate slot
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unsigned Index = 2;
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unsigned NumRets = MI->getOperand(Index++).getImm();
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for (unsigned i = 0; i < NumRets; ++i) {
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if (i == 0) {
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O << "(";
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} else {
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O << ", ";
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}
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printOperand(MI, Index++, O);
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}
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if (NumRets > 0) {
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O << "(";
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printOperand(MI, Index++, O);
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for (unsigned i = 1; i < NumRets; ++i) {
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O << ", ";
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printOperand(MI, Index++, O);
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}
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O << "), ";
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}
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O << *(MI->getOperand(Index++).getExpr()) << ", (";
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unsigned NumArgs = MI->getOperand(Index++).getImm();
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for (unsigned i = 0; i < NumArgs; ++i) {
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if (NumArgs > 0) {
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printOperand(MI, Index++, O);
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if (i < NumArgs-1) {
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for (unsigned i = 1; i < NumArgs; ++i) {
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O << ", ";
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printOperand(MI, Index++, O);
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}
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}
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O << ")";
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}
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@ -140,11 +139,12 @@ void PTXInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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void PTXInstPrinter::printMemOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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// By definition, operand OpNo+1 is an i32imm
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const MCOperand &Op2 = MI->getOperand(OpNo+1);
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printOperand(MI, OpNo, O);
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if (MI->getOperand(OpNo+1).isImm() && MI->getOperand(OpNo+1).getImm() == 0)
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if (Op2.getImm() == 0)
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return; // don't print "+0"
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O << "+";
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printOperand(MI, OpNo+1, O);
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O << "+" << Op2.getImm();
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}
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void PTXInstPrinter::printRoundingMode(const MCInst *MI, unsigned OpNo,
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@ -20,21 +20,23 @@
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#include "PTXMCTargetDesc.h"
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namespace llvm {
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namespace PTX {
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enum StateSpace {
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GLOBAL = 0, // default to global state space
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CONSTANT = 1,
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LOCAL = 2,
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PARAMETER = 3,
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SHARED = 4
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namespace PTXStateSpace {
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enum {
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Global = 0, // default to global state space
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Constant = 1,
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Local = 2,
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Parameter = 3,
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Shared = 4
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};
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} // namespace PTXStateSpace
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enum Predicate {
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PRED_NORMAL = 0,
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PRED_NEGATE = 1,
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PRED_NONE = 2
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namespace PTXPredicate {
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enum {
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Normal = 0,
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Negate = 1,
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None = 2
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};
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} // namespace PTX
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} // namespace PTXPredicate
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/// Namespace to hold all target-specific flags.
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namespace PTXRoundingMode {
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@ -62,9 +62,8 @@ static MCInstPrinter *createPTXMCInstPrinter(const Target &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCSubtargetInfo &STI) {
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if (SyntaxVariant == 0)
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return new PTXInstPrinter(MAI, STI);
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return 0;
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assert(SyntaxVariant == 0 && "We only have one syntax variant");
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return new PTXInstPrinter(MAI, STI);
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}
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extern "C" void LLVMInitializePTXTargetMC() {
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@ -72,11 +72,11 @@ static const char *getRegisterTypeName(unsigned RegNo,
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static const char *getStateSpaceName(unsigned addressSpace) {
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switch (addressSpace) {
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default: llvm_unreachable("Unknown state space");
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case PTX::GLOBAL: return "global";
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case PTX::CONSTANT: return "const";
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case PTX::LOCAL: return "local";
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case PTX::PARAMETER: return "param";
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case PTX::SHARED: return "shared";
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case PTXStateSpace::Global: return "global";
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case PTXStateSpace::Constant: return "const";
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case PTXStateSpace::Local: return "local";
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case PTXStateSpace::Parameter: return "param";
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case PTXStateSpace::Shared: return "shared";
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}
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return NULL;
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}
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@ -279,147 +279,11 @@ void PTXAsmPrinter::EmitFunctionBodyEnd() {
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}
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void PTXAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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#if 0
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std::string str;
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str.reserve(64);
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raw_string_ostream OS(str);
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DebugLoc DL = MI->getDebugLoc();
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if (!DL.isUnknown()) {
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const MDNode *S = DL.getScope(MF->getFunction()->getContext());
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// This is taken from DwarfDebug.cpp, which is conveniently not a public
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// LLVM class.
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StringRef Fn;
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StringRef Dir;
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unsigned Src = 1;
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if (S) {
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DIDescriptor Scope(S);
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if (Scope.isCompileUnit()) {
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DICompileUnit CU(S);
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Fn = CU.getFilename();
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Dir = CU.getDirectory();
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} else if (Scope.isFile()) {
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DIFile F(S);
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Fn = F.getFilename();
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Dir = F.getDirectory();
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} else if (Scope.isSubprogram()) {
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DISubprogram SP(S);
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Fn = SP.getFilename();
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Dir = SP.getDirectory();
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} else if (Scope.isLexicalBlock()) {
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DILexicalBlock DB(S);
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Fn = DB.getFilename();
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Dir = DB.getDirectory();
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} else
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assert(0 && "Unexpected scope info");
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Src = GetOrCreateSourceID(Fn, Dir);
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}
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OutStreamer.EmitDwarfLocDirective(Src, DL.getLine(), DL.getCol(),
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0, 0, 0, Fn);
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const MCDwarfLoc& MDL = OutContext.getCurrentDwarfLoc();
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OS << "\t.loc ";
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OS << utostr(MDL.getFileNum());
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OS << " ";
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OS << utostr(MDL.getLine());
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OS << " ";
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OS << utostr(MDL.getColumn());
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OS << "\n";
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}
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// Emit predicate
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printPredicateOperand(MI, OS);
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// Write instruction to str
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if (MI->getOpcode() == PTX::CALL) {
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printCall(MI, OS);
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} else {
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printInstruction(MI, OS);
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}
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OS << ';';
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OS.flush();
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StringRef strref = StringRef(str);
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OutStreamer.EmitRawText(strref);
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#endif
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MCInst TmpInst;
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LowerPTXMachineInstrToMCInst(MI, TmpInst, *this);
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OutStreamer.EmitInstruction(TmpInst);
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}
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void PTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
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raw_ostream &OS) {
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const MachineOperand &MO = MI->getOperand(opNum);
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const PTXMachineFunctionInfo *MFI = MF->getInfo<PTXMachineFunctionInfo>();
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switch (MO.getType()) {
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default:
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llvm_unreachable("<unknown operand type>");
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break;
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case MachineOperand::MO_GlobalAddress:
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OS << *Mang->getSymbol(MO.getGlobal());
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break;
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case MachineOperand::MO_Immediate:
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OS << (long) MO.getImm();
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break;
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case MachineOperand::MO_MachineBasicBlock:
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OS << *MO.getMBB()->getSymbol();
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break;
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case MachineOperand::MO_Register:
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OS << MFI->getRegisterName(MO.getReg());
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break;
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case MachineOperand::MO_ExternalSymbol:
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OS << MO.getSymbolName();
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break;
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case MachineOperand::MO_FPImmediate:
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APInt constFP = MO.getFPImm()->getValueAPF().bitcastToAPInt();
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bool isFloat = MO.getFPImm()->getType()->getTypeID() == Type::FloatTyID;
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// Emit 0F for 32-bit floats and 0D for 64-bit doubles.
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if (isFloat) {
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OS << "0F";
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}
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else {
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OS << "0D";
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}
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// Emit the encoded floating-point value.
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if (constFP.getZExtValue() > 0) {
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OS << constFP.toString(16, false);
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}
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else {
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OS << "00000000";
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// If We have a double-precision zero, pad to 8-bytes.
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if (!isFloat) {
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OS << "00000000";
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}
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}
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break;
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}
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}
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void PTXAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
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raw_ostream &OS, const char *Modifier) {
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printOperand(MI, opNum, OS);
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if (MI->getOperand(opNum+1).isImm() && MI->getOperand(opNum+1).getImm() == 0)
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return; // don't print "+0"
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OS << "+";
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printOperand(MI, opNum+1, OS);
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}
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void PTXAsmPrinter::printReturnOperand(const MachineInstr *MI, int opNum,
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raw_ostream &OS, const char *Modifier) {
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//OS << RETURN_PREFIX << (int) MI->getOperand(opNum).getImm() + 1;
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OS << "__ret";
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}
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void PTXAsmPrinter::EmitVariableDeclaration(const GlobalVariable *gv) {
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// Check to see if this is a special global used by LLVM, if so, emit it.
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if (EmitSpecialLLVMGlobal(gv))
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@ -613,63 +477,6 @@ void PTXAsmPrinter::EmitFunctionEntryLabel() {
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OutStreamer.EmitRawText(Twine(decl));
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}
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void PTXAsmPrinter::
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printPredicateOperand(const MachineInstr *MI, raw_ostream &O) {
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int i = MI->findFirstPredOperandIdx();
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if (i == -1)
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llvm_unreachable("missing predicate operand");
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unsigned reg = MI->getOperand(i).getReg();
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int predOp = MI->getOperand(i+1).getImm();
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const PTXMachineFunctionInfo *MFI = MF->getInfo<PTXMachineFunctionInfo>();
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DEBUG(dbgs() << "predicate: (" << reg << ", " << predOp << ")\n");
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if (reg != PTX::NoRegister) {
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O << '@';
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if (predOp == PTX::PRED_NEGATE)
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O << '!';
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O << MFI->getRegisterName(reg);
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}
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}
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void PTXAsmPrinter::
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printCall(const MachineInstr *MI, raw_ostream &O) {
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O << "\tcall.uni\t";
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// The first two operands are the predicate slot
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unsigned Index = 2;
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while (!MI->getOperand(Index).isGlobal()) {
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if (Index == 2) {
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O << "(";
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} else {
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O << ", ";
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}
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printOperand(MI, Index, O);
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Index++;
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}
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if (Index != 2) {
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O << "), ";
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}
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assert(MI->getOperand(Index).isGlobal() &&
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"A GlobalAddress must follow the return arguments");
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const GlobalValue *Address = MI->getOperand(Index).getGlobal();
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O << Address->getName() << ", (";
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Index++;
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while (Index < MI->getNumOperands()) {
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printOperand(MI, Index, O);
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if (Index < MI->getNumOperands()-1) {
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O << ", ";
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}
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Index++;
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}
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O << ")";
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}
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unsigned PTXAsmPrinter::GetOrCreateSourceID(StringRef FileName,
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StringRef DirName) {
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// If FE did not provide a file name, then assume stdin.
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@ -704,7 +511,8 @@ MCOperand PTXAsmPrinter::GetSymbolRef(const MachineOperand &MO,
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return MCOperand::CreateExpr(Expr);
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}
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bool PTXAsmPrinter::lowerOperand(const MachineOperand &MO, MCOperand &MCOp) {
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MCOperand PTXAsmPrinter::lowerOperand(const MachineOperand &MO) {
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MCOperand MCOp;
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const PTXMachineFunctionInfo *MFI = MF->getInfo<PTXMachineFunctionInfo>();
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const MCExpr *Expr;
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const char *RegSymbolName;
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@ -742,7 +550,7 @@ bool PTXAsmPrinter::lowerOperand(const MachineOperand &MO, MCOperand &MCOp) {
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break;
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}
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return true;
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return MCOp;
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}
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// Force static initialization.
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@ -39,24 +39,11 @@ public:
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virtual void EmitFunctionEntryLabel();
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virtual void EmitInstruction(const MachineInstr *MI);
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void printOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
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void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &OS,
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const char *Modifier = 0);
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void printReturnOperand(const MachineInstr *MI, int opNum, raw_ostream &OS,
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const char *Modifier = 0);
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void printPredicateOperand(const MachineInstr *MI, raw_ostream &O);
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void printCall(const MachineInstr *MI, raw_ostream &O);
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unsigned GetOrCreateSourceID(StringRef FileName,
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StringRef DirName);
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MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol);
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bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp);
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// autogen'd.
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void printInstruction(const MachineInstr *MI, raw_ostream &OS);
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static const char *getRegisterName(unsigned RegNo);
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MCOperand lowerOperand(const MachineOperand &MO);
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private:
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void EmitVariableDeclaration(const GlobalVariable *gv);
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@ -92,7 +92,7 @@ SDNode *PTXDAGToDAGISel::SelectBRCOND(SDNode *Node) {
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SDValue Chain = Node->getOperand(0);
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SDValue Pred = Node->getOperand(1);
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SDValue Target = Node->getOperand(2); // branch target
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SDValue PredOp = CurDAG->getTargetConstant(PTX::PRED_NORMAL, MVT::i32);
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SDValue PredOp = CurDAG->getTargetConstant(PTXPredicate::Normal, MVT::i32);
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DebugLoc dl = Node->getDebugLoc();
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assert(Target.getOpcode() == ISD::BasicBlock);
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@ -129,7 +129,7 @@ SDNode *PTXDAGToDAGISel::SelectREADPARAM(SDNode *Node) {
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OpCode = PTX::READPARAMF64;
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SDValue Pred = CurDAG->getRegister(PTX::NoRegister, MVT::i1);
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SDValue PredOp = CurDAG->getTargetConstant(PTX::PRED_NONE, MVT::i32);
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SDValue PredOp = CurDAG->getTargetConstant(PTXPredicate::None, MVT::i32);
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DebugLoc dl = Node->getDebugLoc();
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SDValue Ops[] = { Index, Pred, PredOp, Chain };
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@ -167,7 +167,7 @@ SDNode *PTXDAGToDAGISel::SelectWRITEPARAM(SDNode *Node) {
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llvm_unreachable("Invalid type in SelectWRITEPARAM");
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SDValue Pred = CurDAG->getRegister(PTX::NoRegister, MVT::i1);
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SDValue PredOp = CurDAG->getTargetConstant(PTX::PRED_NONE, MVT::i32);
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SDValue PredOp = CurDAG->getTargetConstant(PTXPredicate::None, MVT::i32);
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DebugLoc dl = Node->getDebugLoc();
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SDValue Ops[] = { Value, Pred, PredOp, Chain };
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@ -167,7 +167,7 @@ DefinesPredicate(MachineInstr *MI,
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return false;
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Pred.push_back(MO);
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Pred.push_back(MachineOperand::CreateImm(PTX::PRED_NONE));
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Pred.push_back(MachineOperand::CreateImm(PTXPredicate::None));
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return true;
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}
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@ -283,7 +283,7 @@ InsertBranch(MachineBasicBlock &MBB,
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BuildMI(&MBB, DL, get(PTX::BRAdp))
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.addMBB(TBB).addReg(Cond[0].getReg()).addImm(Cond[1].getImm());
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BuildMI(&MBB, DL, get(PTX::BRAd))
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.addMBB(FBB).addReg(PTX::NoRegister).addImm(PTX::PRED_NONE);
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.addMBB(FBB).addReg(PTX::NoRegister).addImm(PTXPredicate::None);
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return 2;
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} else if (Cond.size()) {
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BuildMI(&MBB, DL, get(PTX::BRAdp))
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@ -291,7 +291,7 @@ InsertBranch(MachineBasicBlock &MBB,
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return 1;
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} else {
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BuildMI(&MBB, DL, get(PTX::BRAd))
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.addMBB(TBB).addReg(PTX::NoRegister).addImm(PTX::PRED_NONE);
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.addMBB(TBB).addReg(PTX::NoRegister).addImm(PTXPredicate::None);
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return 1;
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}
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}
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@ -319,7 +319,7 @@ MachineSDNode *PTXInstrInfo::
|
||||
GetPTXMachineNode(SelectionDAG *DAG, unsigned Opcode,
|
||||
DebugLoc dl, EVT VT, SDValue Op1) {
|
||||
SDValue predReg = DAG->getRegister(PTX::NoRegister, MVT::i1);
|
||||
SDValue predOp = DAG->getTargetConstant(PTX::PRED_NONE, MVT::i32);
|
||||
SDValue predOp = DAG->getTargetConstant(PTXPredicate::None, MVT::i32);
|
||||
SDValue ops[] = { Op1, predReg, predOp };
|
||||
return DAG->getMachineNode(Opcode, dl, VT, ops, array_lengthof(ops));
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||||
}
|
||||
@ -328,7 +328,7 @@ MachineSDNode *PTXInstrInfo::
|
||||
GetPTXMachineNode(SelectionDAG *DAG, unsigned Opcode,
|
||||
DebugLoc dl, EVT VT, SDValue Op1, SDValue Op2) {
|
||||
SDValue predReg = DAG->getRegister(PTX::NoRegister, MVT::i1);
|
||||
SDValue predOp = DAG->getTargetConstant(PTX::PRED_NONE, MVT::i32);
|
||||
SDValue predOp = DAG->getTargetConstant(PTXPredicate::None, MVT::i32);
|
||||
SDValue ops[] = { Op1, Op2, predReg, predOp };
|
||||
return DAG->getMachineNode(Opcode, dl, VT, ops, array_lengthof(ops));
|
||||
}
|
||||
@ -336,7 +336,7 @@ GetPTXMachineNode(SelectionDAG *DAG, unsigned Opcode,
|
||||
void PTXInstrInfo::AddDefaultPredicate(MachineInstr *MI) {
|
||||
if (MI->findFirstPredOperandIdx() == -1) {
|
||||
MI->addOperand(MachineOperand::CreateReg(PTX::NoRegister, /*IsDef=*/false));
|
||||
MI->addOperand(MachineOperand::CreateImm(PTX::PRED_NONE));
|
||||
MI->addOperand(MachineOperand::CreateImm(PTXPredicate::None));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -26,7 +26,7 @@ def load_global : PatFrag<(ops node:$ptr), (load node:$ptr), [{
|
||||
const PointerType *PT;
|
||||
if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
|
||||
(PT = dyn_cast<PointerType>(Src->getType())))
|
||||
return PT->getAddressSpace() == PTX::GLOBAL;
|
||||
return PT->getAddressSpace() == PTXStateSpace::Global;
|
||||
return false;
|
||||
}]>;
|
||||
|
||||
@ -35,7 +35,7 @@ def load_constant : PatFrag<(ops node:$ptr), (load node:$ptr), [{
|
||||
const PointerType *PT;
|
||||
if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
|
||||
(PT = dyn_cast<PointerType>(Src->getType())))
|
||||
return PT->getAddressSpace() == PTX::CONSTANT;
|
||||
return PT->getAddressSpace() == PTXStateSpace::Constant;
|
||||
return false;
|
||||
}]>;
|
||||
|
||||
@ -44,7 +44,7 @@ def load_shared : PatFrag<(ops node:$ptr), (load node:$ptr), [{
|
||||
const PointerType *PT;
|
||||
if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
|
||||
(PT = dyn_cast<PointerType>(Src->getType())))
|
||||
return PT->getAddressSpace() == PTX::SHARED;
|
||||
return PT->getAddressSpace() == PTXStateSpace::Shared;
|
||||
return false;
|
||||
}]>;
|
||||
|
||||
@ -54,7 +54,7 @@ def store_global
|
||||
const PointerType *PT;
|
||||
if ((Src = cast<StoreSDNode>(N)->getSrcValue()) &&
|
||||
(PT = dyn_cast<PointerType>(Src->getType())))
|
||||
return PT->getAddressSpace() == PTX::GLOBAL;
|
||||
return PT->getAddressSpace() == PTXStateSpace::Global;
|
||||
return false;
|
||||
}]>;
|
||||
|
||||
@ -64,7 +64,7 @@ def store_shared
|
||||
const PointerType *PT;
|
||||
if ((Src = cast<StoreSDNode>(N)->getSrcValue()) &&
|
||||
(PT = dyn_cast<PointerType>(Src->getType())))
|
||||
return PT->getAddressSpace() == PTX::SHARED;
|
||||
return PT->getAddressSpace() == PTXStateSpace::Shared;
|
||||
return false;
|
||||
}]>;
|
||||
|
||||
|
@ -100,7 +100,7 @@ public:
|
||||
/// @{
|
||||
|
||||
virtual void ChangeSection(const MCSection *Section);
|
||||
virtual void InitSections() {}
|
||||
virtual void InitSections() { /* PTX does not use sections */ }
|
||||
|
||||
virtual void EmitLabel(MCSymbol *Symbol);
|
||||
|
||||
@ -235,7 +235,7 @@ void PTXMCAsmStreamer::ChangeSection(const MCSection *Section) {
|
||||
void PTXMCAsmStreamer::EmitLabel(MCSymbol *Symbol) {
|
||||
assert(Symbol->isUndefined() && "Cannot define a symbol twice!");
|
||||
assert(!Symbol->isVariable() && "Cannot emit a variable symbol!");
|
||||
//assert(getCurrentSection() && "Cannot emit before setting section!");
|
||||
assert(getCurrentSection() && "Cannot emit before setting section!");
|
||||
|
||||
OS << *Symbol << MAI.getLabelSuffix();
|
||||
EmitEOL();
|
||||
@ -499,7 +499,7 @@ bool PTXMCAsmStreamer::EmitDwarfFileDirective(unsigned FileNo,
|
||||
void PTXMCAsmStreamer::AddEncodingComment(const MCInst &Inst) {}
|
||||
|
||||
void PTXMCAsmStreamer::EmitInstruction(const MCInst &Inst) {
|
||||
//assert(getCurrentSection() && "Cannot emit contents before setting section!");
|
||||
assert(getCurrentSection() && "Cannot emit contents before setting section!");
|
||||
|
||||
// Show the encoding in a comment if we have a code emitter.
|
||||
if (Emitter)
|
||||
|
@ -26,8 +26,7 @@ void llvm::LowerPTXMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
|
||||
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
|
||||
const MachineOperand &MO = MI->getOperand(i);
|
||||
MCOperand MCOp;
|
||||
if (AP.lowerOperand(MO, MCOp))
|
||||
OutMI.addOperand(MCOp);
|
||||
OutMI.addOperand(AP.lowerOperand(MO));
|
||||
}
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user