mirror of
https://github.com/RPCSX/llvm.git
synced 2024-11-25 20:59:51 +00:00
Fix PR4484.
This was caused by me confounding FP0 and ST(0). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74523 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
50564ebc9e
commit
f55715c5c7
@ -990,16 +990,18 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) {
|
||||
}
|
||||
case X86::FpSET_ST0_32:
|
||||
case X86::FpSET_ST0_64:
|
||||
case X86::FpSET_ST0_80:
|
||||
case X86::FpSET_ST0_80: {
|
||||
unsigned RegOnTop = getStackEntry(0);
|
||||
// FpSET_ST0_80 is generated by copyRegToReg for both function return
|
||||
// and inline assembly with the "st" constrain. In the latter case,
|
||||
// it is possible for FP0 to be alive after this instruction.
|
||||
if (!MI->killsRegister(X86::FP0)) {
|
||||
// it is possible for ST(0) to be alive after this instruction.
|
||||
if (!MI->killsRegister(X86::FP0 + RegOnTop)) {
|
||||
// Duplicate ST0
|
||||
duplicateToTop(0, 7 /*temp register*/, I);
|
||||
}
|
||||
--StackTop; // "Forget" we have something on the top of stack!
|
||||
break;
|
||||
}
|
||||
case X86::FpSET_ST1_32:
|
||||
case X86::FpSET_ST1_64:
|
||||
case X86::FpSET_ST1_80:
|
||||
|
15
test/CodeGen/X86/inline-asm-fpstack4.ll
Normal file
15
test/CodeGen/X86/inline-asm-fpstack4.ll
Normal file
@ -0,0 +1,15 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 > %t
|
||||
; PR4484
|
||||
|
||||
declare x86_fp80 @ceil()
|
||||
|
||||
declare void @test(x86_fp80)
|
||||
|
||||
define void @test2(x86_fp80 %a) {
|
||||
entry:
|
||||
%0 = call x86_fp80 @ceil()
|
||||
call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %a)
|
||||
call void @test(x86_fp80 %0)
|
||||
ret void
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user