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[Hexagon] Remove RDefMap, use Liveness:getNearestAliasedRef instead

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300706 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Krzysztof Parzyszek 2017-04-19 15:14:30 +00:00
parent ad6758286a
commit f6728e6d7d
1 changed files with 5 additions and 48 deletions
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53
lib/Target/Hexagon/HexagonOptAddrMode.cpp
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@ -35,7 +35,6 @@
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstdint>
#include <map>
static cl::opt<int> CodeGrowthLimit("hexagon-amode-growth-limit",
cl::Hidden, cl::init(0), cl::desc("Code growth limit for address mode "
@ -84,7 +83,6 @@ private:
MachineDominatorTree *MDT;
DataFlowGraph *DFG;
DataFlowGraph::DefStackMap DefM;
std::map<RegisterRef, std::map<NodeId, NodeId>> RDefMap;
Liveness *LV;
MISetType Deleted;
@ -99,8 +97,6 @@ private:
void getAllRealUses(NodeAddr<StmtNode *> SN, NodeList &UNodeList);
bool allValidCandidates(NodeAddr<StmtNode *> SA, NodeList &UNodeList);
short getBaseWithLongOffset(const MachineInstr &MI) const;
void updateMap(NodeAddr<InstrNode *> IA);
bool constructDefMap(MachineBasicBlock *B);
bool changeStore(MachineInstr *OldMI, MachineOperand ImmOp,
unsigned ImmOpNum);
bool changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, unsigned ImmOpNum);
@ -173,8 +169,11 @@ bool HexagonOptAddrMode::canRemoveAddasl(NodeAddr<StmtNode *> AddAslSN,
for (auto I = UNodeList.rbegin(), E = UNodeList.rend(); I != E; ++I) {
NodeAddr<UseNode *> UA = *I;
NodeAddr<InstrNode *> IA = UA.Addr->getOwner(*DFG);
if ((UA.Addr->getFlags() & NodeAttrs::PhiRef) ||
RDefMap[OffsetRR][IA.Id] != OffsetRegRD)
if (UA.Addr->getFlags() & NodeAttrs::PhiRef)
return false;
NodeAddr<RefNode*> AA = LV->getNearestAliasedRef(OffsetRR, IA);
if ((DFG->IsDef(AA) && AA.Id != OffsetRegRD) ||
AA.Addr->getReachingDef() != OffsetRegRD)
return false;
MachineInstr &UseMI = *NodeAddr<StmtNode *>(IA).Addr->getCode();
@ -597,46 +596,6 @@ bool HexagonOptAddrMode::processBlock(NodeAddr<BlockNode *> BA) {
return Changed;
}
void HexagonOptAddrMode::updateMap(NodeAddr<InstrNode *> IA) {
RegisterSet RRs;
for (NodeAddr<RefNode *> RA : IA.Addr->members(*DFG))
RRs.insert(RA.Addr->getRegRef(*DFG));
bool Common = false;
for (auto &R : RDefMap) {
if (!RRs.count(R.first))
continue;
Common = true;
break;
}
if (!Common)
return;
for (auto &R : RDefMap) {
auto F = DefM.find(R.first.Reg);
if (F == DefM.end() || F->second.empty())
continue;
R.second[IA.Id] = F->second.top()->Id;
}
}
bool HexagonOptAddrMode::constructDefMap(MachineBasicBlock *B) {
bool Changed = false;
auto BA = DFG->getFunc().Addr->findBlock(B, *DFG);
DFG->markBlock(BA.Id, DefM);
for (NodeAddr<InstrNode *> IA : BA.Addr->members(*DFG)) {
updateMap(IA);
DFG->pushAllDefs(IA, DefM);
}
MachineDomTreeNode *N = MDT->getNode(B);
for (auto I : *N)
Changed |= constructDefMap(I->getBlock());
DFG->releaseBlock(BA.Id, DefM);
return Changed;
}
bool HexagonOptAddrMode::runOnMachineFunction(MachineFunction &MF) {
if (skipFunction(*MF.getFunction()))
return false;
@ -658,8 +617,6 @@ bool HexagonOptAddrMode::runOnMachineFunction(MachineFunction &MF) {
L.computePhiInfo();
LV = &L;
constructDefMap(&DFG->getMF().front());
Deleted.clear();
NodeAddr<FuncNode *> FA = DFG->getFunc();
DEBUG(dbgs() << "==== [RefMap#]=====:\n "