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[mips][mcjit] Add the majority of N32 support.
The missing piece is relocation composition for %hi(%neg(%gp_rel(x))) and similar. Patch by: Daniel Sanders git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284724 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Dardis
parent
7b259eb4f8
commit
f7463aa366
@ -585,22 +585,33 @@ void RuntimeDyldELF::setMipsABI(const ObjectFile &Obj) {
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if (Arch == Triple::UnknownArch ||
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!StringRef(Triple::getArchTypePrefix(Arch)).equals("mips")) {
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IsMipsO32ABI = false;
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IsMipsN32ABI = false;
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IsMipsN64ABI = false;
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return;
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}
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unsigned AbiVariant;
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Obj.getPlatformFlags(AbiVariant);
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IsMipsO32ABI = AbiVariant & ELF::EF_MIPS_ABI_O32;
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IsMipsN32ABI = AbiVariant & ELF::EF_MIPS_ABI2;
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IsMipsN64ABI = Obj.getFileFormatName().equals("ELF64-mips");
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if (AbiVariant & ELF::EF_MIPS_ABI2)
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llvm_unreachable("Mips N32 ABI is not supported yet");
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}
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void RuntimeDyldELF::resolveMIPS64Relocation(const SectionEntry &Section,
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uint64_t Offset, uint64_t Value,
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uint32_t Type, int64_t Addend,
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uint64_t SymOffset,
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SID SectionID) {
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void RuntimeDyldELF::resolveMIPSN32Relocation(const SectionEntry &Section,
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uint64_t Offset, uint64_t Value,
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uint32_t Type, int64_t Addend,
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uint64_t SymOffset,
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SID SectionID) {
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int64_t CalculatedValue = evaluateMIPS64Relocation(
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Section, Offset, Value, Type, Addend, SymOffset, SectionID);
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applyMIPS64Relocation(Section.getAddressWithOffset(Offset), CalculatedValue,
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Type);
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}
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void RuntimeDyldELF::resolveMIPSN64Relocation(const SectionEntry &Section,
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uint64_t Offset, uint64_t Value,
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uint32_t Type, int64_t Addend,
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uint64_t SymOffset,
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SID SectionID) {
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uint32_t r_type = Type & 0xff;
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uint32_t r_type2 = (Type >> 8) & 0xff;
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uint32_t r_type3 = (Type >> 16) & 0xff;
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@ -669,7 +680,7 @@ RuntimeDyldELF::evaluateMIPS64Relocation(const SectionEntry &Section,
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case ELF::R_MIPS_GOT_PAGE: {
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uint8_t *LocalGOTAddr =
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getSectionAddress(SectionToGOTMap[SectionID]) + SymOffset;
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uint64_t GOTEntry = readBytesUnaligned(LocalGOTAddr, 8);
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uint64_t GOTEntry = readBytesUnaligned(LocalGOTAddr, getGOTEntrySize());
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Value += Addend;
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if (Type == ELF::R_MIPS_GOT_PAGE)
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@ -679,7 +690,7 @@ RuntimeDyldELF::evaluateMIPS64Relocation(const SectionEntry &Section,
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assert(GOTEntry == Value &&
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"GOT entry has two different addresses.");
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else
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writeBytesUnaligned(Value, LocalGOTAddr, 8);
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writeBytesUnaligned(Value, LocalGOTAddr, getGOTEntrySize());
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return (SymOffset - 0x7ff0) & 0xffff;
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}
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@ -1131,9 +1142,12 @@ void RuntimeDyldELF::resolveRelocation(const SectionEntry &Section,
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if (IsMipsO32ABI)
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resolveMIPSRelocation(Section, Offset, (uint32_t)(Value & 0xffffffffL),
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Type, (uint32_t)(Addend & 0xffffffffL));
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else if (IsMipsN32ABI)
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resolveMIPSN32Relocation(Section, Offset, Value, Type, Addend, SymOffset,
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SectionID);
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else if (IsMipsN64ABI)
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resolveMIPS64Relocation(Section, Offset, Value, Type, Addend, SymOffset,
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SectionID);
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resolveMIPSN64Relocation(Section, Offset, Value, Type, Addend, SymOffset,
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SectionID);
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else
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llvm_unreachable("Mips ABI not handled");
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break;
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@ -1469,7 +1483,7 @@ RuntimeDyldELF::processRelocationRef(
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Value.Addend += SignExtend32<28>((Opcode & 0x03ffffff) << 2);
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processSimpleRelocation(SectionID, Offset, RelType, Value);
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}
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} else if (IsMipsN64ABI) {
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} else if (IsMipsN32ABI || IsMipsN64ABI) {
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uint32_t r_type = RelType & 0xff;
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RelocationEntry RE(SectionID, Offset, RelType, Value.Addend);
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if (r_type == ELF::R_MIPS_CALL16 || r_type == ELF::R_MIPS_GOT_PAGE
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@ -1806,7 +1820,7 @@ size_t RuntimeDyldELF::getGOTEntrySize() {
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case Triple::mipsel:
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case Triple::mips64:
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case Triple::mips64el:
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if (IsMipsO32ABI)
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if (IsMipsO32ABI || IsMipsN32ABI)
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Result = sizeof(uint32_t);
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else if (IsMipsN64ABI)
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Result = sizeof(uint64_t);
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@ -1871,7 +1885,7 @@ Error RuntimeDyldELF::finalizeLoad(const ObjectFile &Obj,
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// For now, initialize all GOT entries to zero. We'll fill them in as
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// needed when GOT-based relocations are applied.
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memset(Addr, 0, TotalSize);
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if (IsMipsN64ABI) {
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if (IsMipsN32ABI || IsMipsN64ABI) {
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// To correctly resolve Mips GOT relocations, we need a mapping from
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// object's sections to GOTs.
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for (section_iterator SI = Obj.section_begin(), SE = Obj.section_end();
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@ -55,9 +55,12 @@ class RuntimeDyldELF : public RuntimeDyldImpl {
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void resolveSystemZRelocation(const SectionEntry &Section, uint64_t Offset,
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uint64_t Value, uint32_t Type, int64_t Addend);
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void resolveMIPS64Relocation(const SectionEntry &Section, uint64_t Offset,
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uint64_t Value, uint32_t Type, int64_t Addend,
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uint64_t SymOffset, SID SectionID);
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void resolveMIPSN32Relocation(const SectionEntry &Section, uint64_t Offset,
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uint64_t Value, uint32_t Type, int64_t Addend,
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uint64_t SymOffset, SID SectionID);
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void resolveMIPSN64Relocation(const SectionEntry &Section, uint64_t Offset,
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uint64_t Value, uint32_t Type, int64_t Addend,
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uint64_t SymOffset, SID SectionID);
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int64_t evaluateMIPS64Relocation(const SectionEntry &Section,
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uint64_t Offset, uint64_t Value,
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@ -290,6 +290,7 @@ protected:
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Triple::ArchType Arch;
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bool IsTargetLittleEndian;
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bool IsMipsO32ABI;
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bool IsMipsN32ABI;
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bool IsMipsN64ABI;
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// True if all sections should be passed to the memory manager, false if only
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@ -353,6 +354,7 @@ protected:
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virtual void setMipsABI(const ObjectFile &Obj) {
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IsMipsO32ABI = false;
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IsMipsN32ABI = false;
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IsMipsN64ABI = false;
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}
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156
test/ExecutionEngine/RuntimeDyld/Mips/ELF_N32_relocations.s
Normal file
156
test/ExecutionEngine/RuntimeDyld/Mips/ELF_N32_relocations.s
Normal file
@ -0,0 +1,156 @@
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# RUN: llvm-mc -triple=mips64el-unknown-linux -target-abi n32 -code-model=small -filetype=obj -o %T/test_ELF_N32.o %s
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# RUN: llc -mtriple=mips64el-unknown-linux -target-abi n32 -filetype=obj -o %T/test_ELF_ExternalFunction_N32.o %S/Inputs/ExternalFunction.ll
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# RUN: llvm-rtdyld -triple=mips64el-unknown-linux -verify -map-section test_ELF_N32.o,.text=0x1000 -map-section test_ELF_ExternalFunction_N32.o,.text=0x10000 -check=%s %/T/test_ELF_N32.o %T/test_ELF_ExternalFunction_N32.o
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# RUN: llvm-mc -triple=mips64-unknown-linux -target-abi n32 -code-model=small -filetype=obj -o %T/test_ELF_N32.o %s
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# RUN: llc -mtriple=mips64-unknown-linux -target-abi n32 -filetype=obj -o %T/test_ELF_ExternalFunction_N32.o %S/Inputs/ExternalFunction.ll
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# RUN: llvm-rtdyld -triple=mips64-unknown-linux -verify -map-section test_ELF_N32.o,.text=0x1000 -map-section test_ELF_ExternalFunction_N32.o,.text=0x10000 -check=%s %/T/test_ELF_N32.o %T/test_ELF_ExternalFunction_N32.o
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.data
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# Test R_MIPS_PC32 relocation.
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# rtdyld-check: *{4}(R_MIPS_PC32) = (foo - R_MIPS_PC32)[31:0]
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R_MIPS_PC32:
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.word foo-.
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# rtdyld-check: *{4}(R_MIPS_PC32 + 4) = (foo - tmp1)[31:0]
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tmp1:
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.4byte foo-tmp1
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.text
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.abicalls
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.section .mdebug.abi64,"",@progbits
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.nan legacy
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.file "ELF_N32_PIC_relocations.ll"
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.text
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.globl bar
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.align 3
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.type bar,@function
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.set nomicromips
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.set nomips16
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.ent bar
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bar:
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.frame $fp,40,$ra
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.mask 0x00000000,0
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.fmask 0x00000000,0
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.set noreorder
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.set nomacro
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.set noat
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daddiu $sp, $sp, -40
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sd $ra, 32($sp)
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sd $fp, 24($sp)
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move $fp, $sp
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sd $4, 16($fp)
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lb $2, 0($4)
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sd $4, 8($fp)
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# Test R_MIPS_26 relocation.
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# rtdyld-check: decode_operand(insn1, 0)[27:0] = foo[27:0]
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insn1:
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.option pic0
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jal foo
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.option pic2
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nop
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# Test R_MIPS_PC16 relocation.
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# rtdyld-check: decode_operand(insn2, 1)[17:0] = (foo - insn2)[17:0]
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insn2:
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bal foo
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nop
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move $sp, $fp
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ld $ra, 32($sp)
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ld $fp, 24($sp)
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daddiu $sp, $sp, 32
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jr $ra
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nop
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.set at
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.set macro
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.set reorder
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.end bar
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$func_end0:
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.size bar, ($func_end0)-bar
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.globl main
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.align 3
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.type main,@function
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.set nomicromips
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.set nomips16
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.ent main
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main:
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.frame $fp,32,$ra
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.mask 0x00000000,0
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.fmask 0x00000000,0
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.set noreorder
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.set nomacro
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.set noat
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daddiu $sp, $sp, -32
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sd $ra, 24($sp)
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sd $fp, 16($sp)
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sd $gp, 8($sp)
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move $fp, $sp
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# $gp register contains address of the .got section + 0x7FF0. 0x7FF0 is
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# the offset of $gp from the beginning of the .got section. Check that we are
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# loading address of the page pointer from correct offset. In this case
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# the page pointer is the first entry in the .got section, so offset will be
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# 0 - 0x7FF0.
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# rtdyld-check: decode_operand(insn5, 2)[15:0] = 0x8010
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#
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# Check that the global offset table contains the page pointer.
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# rtdyld-check: *{4}(section_addr(test_ELF_N32.o, .got)) = (_str + 0x8000) & 0xffff0000
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insn5:
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ld $25, %got_page(_str)($1)
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# Check the offset of _str from the page pointer.
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# rtdyld-check: decode_operand(insn6, 2)[15:0] = _str[15:0]
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insn6:
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daddiu $25, $25, %got_ofst(_str)
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# Check that we are loading address of var from correct offset. In this case
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# var is the second entry in the .got section, so offset will be 4 - 0x7FF0.
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# rtdyld-check: decode_operand(insn7, 2)[15:0] = 0x8014
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#
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# Check that the global offset table contains the address of the var.
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# rtdyld-check: *{4}(section_addr(test_ELF_N32.o, .got) + 4) = var
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insn7:
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ld $2, %got_disp(var)($1)
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sd $25, 0($2)
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# Check that we are loading address of bar from correct offset. In this case
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# bar is the third entry in the .got section, so offset will be 8 - 0x7FF0.
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# rtdyld-check: decode_operand(insn8, 2)[15:0] = 0x8018
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#
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# Check that the global offset table contains the address of the bar.
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# rtdyld-check: *{4}(section_addr(test_ELF_N32.o, .got) + 8) = bar
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insn8:
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ld $2, %call16(bar)($1)
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move $4, $25
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move $gp, $1
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move $25, $2
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jalr $25
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nop
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move $sp, $fp
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ld $gp, 8($sp)
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ld $fp, 16($sp)
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ld $ra, 24($sp)
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daddiu $sp, $sp, 32
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jr $ra
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nop
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.set at
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.set macro
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.set reorder
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.end main
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$func_end1:
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.size main, ($func_end1)-main
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.type _str,@object
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.section .rodata.str1.1,"aMS",@progbits,1
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_str:
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.asciz "test"
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.size _str, 5
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.type var,@object
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.comm var,8,8
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.section ".note.GNU-stack","",@progbits
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.text
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