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Replace copyRegToReg with copyPhysReg for SystemZ.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108092 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-07-11 16:40:46 +00:00
parent 75be45cb2e
commit f7d55b97f0
2 changed files with 27 additions and 57 deletions
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75
lib/Target/SystemZ/SystemZInstrInfo.cpp
View File

@ -117,59 +117,30 @@ void SystemZInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
addFrameReference(BuildMI(MBB, MI, DL, get(Opc), DestReg), FrameIdx);
}
bool SystemZInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *DestRC,
const TargetRegisterClass *SrcRC,
DebugLoc DL) const {
void SystemZInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I, DebugLoc DL,
unsigned DestReg, unsigned SrcReg,
bool KillSrc) const {
unsigned Opc;
if (SystemZ::GR64RegClass.contains(DestReg, SrcReg))
Opc = SystemZ::MOV64rr;
else if (SystemZ::GR32RegClass.contains(DestReg, SrcReg))
Opc = SystemZ::MOV32rr;
else if (SystemZ::GR64PRegClass.contains(DestReg, SrcReg))
Opc = SystemZ::MOV64rrP;
else if (SystemZ::GR128RegClass.contains(DestReg, SrcReg))
Opc = SystemZ::MOV128rr;
else if (SystemZ::GR32RegClass.contains(DestReg, SrcReg))
Opc = SystemZ::MOV32rr;
else if (SystemZ::FP32RegClass.contains(DestReg, SrcReg))
Opc = SystemZ::FMOV32rr;
else if (SystemZ::FP64RegClass.contains(DestReg, SrcReg))
Opc = SystemZ::FMOV64rr;
else
llvm_unreachable("Impossible reg-to-reg copy");
// Determine if DstRC and SrcRC have a common superclass.
const TargetRegisterClass *CommonRC = DestRC;
if (DestRC == SrcRC)
/* Same regclass for source and dest */;
else if (CommonRC->hasSuperClass(SrcRC))
CommonRC = SrcRC;
else if (!CommonRC->hasSubClass(SrcRC))
CommonRC = 0;
if (CommonRC) {
if (CommonRC == &SystemZ::GR64RegClass ||
CommonRC == &SystemZ::ADDR64RegClass) {
BuildMI(MBB, I, DL, get(SystemZ::MOV64rr), DestReg).addReg(SrcReg);
} else if (CommonRC == &SystemZ::GR32RegClass ||
CommonRC == &SystemZ::ADDR32RegClass) {
BuildMI(MBB, I, DL, get(SystemZ::MOV32rr), DestReg).addReg(SrcReg);
} else if (CommonRC == &SystemZ::GR64PRegClass) {
BuildMI(MBB, I, DL, get(SystemZ::MOV64rrP), DestReg).addReg(SrcReg);
} else if (CommonRC == &SystemZ::GR128RegClass) {
BuildMI(MBB, I, DL, get(SystemZ::MOV128rr), DestReg).addReg(SrcReg);
} else if (CommonRC == &SystemZ::FP32RegClass) {
BuildMI(MBB, I, DL, get(SystemZ::FMOV32rr), DestReg).addReg(SrcReg);
} else if (CommonRC == &SystemZ::FP64RegClass) {
BuildMI(MBB, I, DL, get(SystemZ::FMOV64rr), DestReg).addReg(SrcReg);
} else {
return false;
}
return true;
}
if ((SrcRC == &SystemZ::GR64RegClass &&
DestRC == &SystemZ::ADDR64RegClass) ||
(DestRC == &SystemZ::GR64RegClass &&
SrcRC == &SystemZ::ADDR64RegClass)) {
BuildMI(MBB, I, DL, get(SystemZ::MOV64rr), DestReg).addReg(SrcReg);
return true;
} else if ((SrcRC == &SystemZ::GR32RegClass &&
DestRC == &SystemZ::ADDR32RegClass) ||
(DestRC == &SystemZ::GR32RegClass &&
SrcRC == &SystemZ::ADDR32RegClass)) {
BuildMI(MBB, I, DL, get(SystemZ::MOV32rr), DestReg).addReg(SrcReg);
return true;
}
return false;
BuildMI(MBB, I, DL, get(Opc), DestReg)
.addReg(SrcReg, getKillRegState(KillSrc));
}
bool

9
lib/Target/SystemZ/SystemZInstrInfo.h
View File

@ -60,11 +60,10 @@ public:
///
virtual const SystemZRegisterInfo &getRegisterInfo() const { return RI; }
bool copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *DestRC,
const TargetRegisterClass *SrcRC,
DebugLoc DL) const;
virtual void copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I, DebugLoc DL,
unsigned DestReg, unsigned SrcReg,
bool KillSrc) const;
bool isMoveInstr(const MachineInstr& MI,
unsigned &SrcReg, unsigned &DstReg,