[ARM] Accept conditional versions of BXNS and BLXNS

These instructions end in "S" but are not flag-setting, so they need including
in the list of special cases in the assembly parser.

Differential Revision: http://reviews.llvm.org/D21077



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272015 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Oliver Stannard 2016-06-07 14:58:48 +00:00
parent a87b055656
commit f88b5f4e1e
2 changed files with 15 additions and 0 deletions

View File

@ -5420,6 +5420,7 @@ StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic,
Mnemonic == "fsts" || Mnemonic == "fcpys" || Mnemonic == "fdivs" ||
Mnemonic == "fmuls" || Mnemonic == "fcmps" || Mnemonic == "fcmpzs" ||
Mnemonic == "vfms" || Mnemonic == "vfnms" || Mnemonic == "fconsts" ||
Mnemonic == "bxns" || Mnemonic == "blxns" ||
(Mnemonic == "movs" && isThumb()))) {
Mnemonic = Mnemonic.slice(0, Mnemonic.size() - 1);
CarrySetting = true;

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@ -146,12 +146,26 @@ sg
// CHECK: bxns r0 @ encoding: [0x04,0x47]
bxns r0
// UNDEF-BASELINE: error: invalid operand for instruction
// UNDEF-BASELINE: error: conditional execution not supported in Thumb1
// CHECK-MAINLINE: it eq @ encoding: [0x08,0xbf]
// CHECK-MAINLINE: bxnseq r1 @ encoding: [0x0c,0x47]
it eq
bxnseq r1
// CHECK: bxns lr @ encoding: [0x74,0x47]
bxns lr
// CHECK: blxns r0 @ encoding: [0x84,0x47]
blxns r0
// UNDEF-BASELINE: error: invalid operand for instruction
// UNDEF-BASELINE: error: conditional execution not supported in Thumb1
// CHECK-MAINLINE: it eq @ encoding: [0x08,0xbf]
// CHECK-MAINLINE: blxnseq r1 @ encoding: [0x8c,0x47]
it eq
blxnseq r1
// CHECK: tt r0, r1 @ encoding: [0x41,0xe8,0x00,0xf0]
tt r0, r1