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Fix jmpl.
Add some FP moves. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14225 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -161,11 +161,15 @@ def CALL : InstV8 {
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}
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// Section B.25 - Jump and Link, p. 126
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// FIXME: are they to be used as branches, calls, or returns? (not used now)
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def JMPLrr : F3_1<2, 0b111000, "jmpl">; // jmpl [rs1+rs2], rd
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def JMPLri : F3_2<2, 0b111000, "jmpl">; // jmpl [rs1+imm], rd
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let isCall = 1 in
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def JMPLrr : F3_1<2, 0b111000, "jmpl">; // jmpl [rs1+rs2], rd
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// Section B.29 - Write State Register Instructions
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def WRrr : F3_1<2, 0b110000, "wr">; // wr rs1, rs2, rd
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def WRri : F3_2<2, 0b110000, "wr">; // wr rs1, imm, rd
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// Floating-point Move Instructions, p. 144
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def FMOVS : F3_3<2, 0b110100, 0b000000001, "fmovs">;
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def FNEGS : F3_3<2, 0b110100, 0b000000101, "fnegs">;
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def FABSS : F3_3<2, 0b110100, 0b000001001, "fabss">;
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@ -161,11 +161,15 @@ def CALL : InstV8 {
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}
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// Section B.25 - Jump and Link, p. 126
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// FIXME: are they to be used as branches, calls, or returns? (not used now)
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def JMPLrr : F3_1<2, 0b111000, "jmpl">; // jmpl [rs1+rs2], rd
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def JMPLri : F3_2<2, 0b111000, "jmpl">; // jmpl [rs1+imm], rd
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let isCall = 1 in
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def JMPLrr : F3_1<2, 0b111000, "jmpl">; // jmpl [rs1+rs2], rd
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// Section B.29 - Write State Register Instructions
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def WRrr : F3_1<2, 0b110000, "wr">; // wr rs1, rs2, rd
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def WRri : F3_2<2, 0b110000, "wr">; // wr rs1, imm, rd
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// Floating-point Move Instructions, p. 144
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def FMOVS : F3_3<2, 0b110100, 0b000000001, "fmovs">;
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def FNEGS : F3_3<2, 0b110100, 0b000000101, "fnegs">;
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def FABSS : F3_3<2, 0b110100, 0b000001001, "fabss">;
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