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[AArch64] FMINNAN/FMAXNAN on f16 is not legal.

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Spotted by Ahmed - in r244594 I inadvertently marked f16 min/max as legal.

I've reverted it here, and marked min/max on scalar f16's as promote. I've also added a testcase. The test just checks that the compiler doesn't fall over - it doesn't create fmin nodes for f16 yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245035 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
James Molloy 2015-08-14 09:08:50 +00:00
parent 0d2d02d317
commit f8e7c14a0b
2 changed files with 15 additions and 2 deletions
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6
lib/Target/AArch64/AArch64ISelLowering.cpp
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@ -301,6 +301,8 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
setOperationAction(ISD::FTRUNC, MVT::f16, Promote);
setOperationAction(ISD::FMINNUM, MVT::f16, Promote);
setOperationAction(ISD::FMAXNUM, MVT::f16, Promote);
setOperationAction(ISD::FMINNAN, MVT::f16, Promote);
setOperationAction(ISD::FMAXNAN, MVT::f16, Promote);
// v4f16 is also a storage-only type, so promote it to v4f32 when that is
// known to be safe.
@ -681,8 +683,8 @@ void AArch64TargetLowering::addTypeForNEON(EVT VT, EVT PromotedBitwiseVT) {
ISD::SABSDIFF, ISD::UABSDIFF})
setOperationAction(Opcode, VT.getSimpleVT(), Legal);
// F[MIN|MAX][NUM|NAN] are available for all FP NEON types.
if (VT.isFloatingPoint())
// F[MIN|MAX][NUM|NAN] are available for all FP NEON types (not f16 though!).
if (VT.isFloatingPoint() && VT.getVectorElementType() != MVT::f16)
for (unsigned Opcode : {ISD::FMINNAN, ISD::FMAXNAN,
ISD::FMINNUM, ISD::FMAXNUM})
setOperationAction(Opcode, VT.getSimpleVT(), Legal);

11
test/CodeGen/AArch64/arm64-fmax.ll
View File

@ -51,3 +51,14 @@ define i64 @test_integer(i64 %in) {
%val = select i1 %cmp, i64 0, i64 %in
ret i64 %val
}
define float @test_f16(half %in) {
; CHECK-LABEL: test_f16:
%cmp = fcmp nnan ult half %in, 0.000000e+00
%val = select i1 %cmp, half %in, half 0.000000e+00
%longer = fpext half %val to float
ret float %longer
; FIXME: It'd be nice for this to create an fmin instruction!
; CHECK: fcvt
; CHECK: fcsel
}