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mi-sched: Reorder Cyclicpath (latency) and CriticalMax (pressure) heuristics.

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The latency based scheduling could induce spills in some cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190177 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2013-09-06 17:32:36 +00:00
parent 38e61122f2
commit f9c2fa8341
1 changed files with 4 additions and 4 deletions
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8
lib/CodeGen/MachineScheduler.cpp
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@ -2469,16 +2469,16 @@ void ConvergingScheduler::tryCandidate(SchedCandidate &Cand,
TryCand, Cand, RegExcess))
return;
// For loops that are acyclic path limited, aggressively schedule for latency.
if (Rem.IsAcyclicLatencyLimited && tryLatency(TryCand, Cand, Zone))
return;
// Avoid increasing the max critical pressure in the scheduled region.
if (DAG->isTrackingPressure() && tryPressure(TryCand.RPDelta.CriticalMax,
Cand.RPDelta.CriticalMax,
TryCand, Cand, RegCritical))
return;
// For loops that are acyclic path limited, aggressively schedule for latency.
if (Rem.IsAcyclicLatencyLimited && tryLatency(TryCand, Cand, Zone))
return;
// Keep clustered nodes together to encourage downstream peephole
// optimizations which may reduce resource requirements.
//