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[AArch64] AArch64CondBrTuningPass generates wrong branch instructions
Some conditional branch instructions generated by this pass are checking the wrong condition code. The instructions TBZ and TBNZ are transformed into B.GE and B.LT instead of B.PL and B.MI respectively. They should only be checking the Negative bit. Differential Revision: https://reviews.llvm.org/D34743 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306550 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -22,7 +22,7 @@
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/// cbz w8, .LBB1_2 -> b.eq .LBB1_2
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///
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/// 3) sub w8, w0, w1 -> subs w8, w0, w1 ; w8 has multiple uses.
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/// tbz w8, #31, .LBB6_2 -> b.ge .LBB6_2
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/// tbz w8, #31, .LBB6_2 -> b.pl .LBB6_2
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///
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//===----------------------------------------------------------------------===//
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@ -129,11 +129,11 @@ MachineInstr *AArch64CondBrTuning::convertToCondBr(MachineInstr &MI) {
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break;
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case AArch64::TBZW:
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case AArch64::TBZX:
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CC = AArch64CC::GE;
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CC = AArch64CC::PL;
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break;
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case AArch64::TBNZW:
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case AArch64::TBNZX:
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CC = AArch64CC::LT;
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CC = AArch64CC::MI;
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break;
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}
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return BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(AArch64::Bcc))
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@ -83,7 +83,7 @@ L2:
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; CHECK-LABEL: test_add_tbz:
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; CHECK: adds
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; CHECK: b.ge
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; CHECK: b.pl
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; CHECK: ret
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define void @test_add_tbz(i32 %a, i32 %b, i32* %ptr) {
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entry:
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@ -99,7 +99,7 @@ L2:
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; CHECK-LABEL: test_subs_tbz:
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; CHECK: subs
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; CHECK: b.ge
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; CHECK: b.pl
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; CHECK: ret
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define void @test_subs_tbz(i32 %a, i32 %b, i32* %ptr) {
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entry:
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@ -115,7 +115,7 @@ L2:
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; CHECK-LABEL: test_add_tbnz
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; CHECK: adds
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; CHECK: b.lt
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; CHECK: b.mi
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; CHECK: ret
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define void @test_add_tbnz(i32 %a, i32 %b, i32* %ptr) {
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entry:
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@ -131,7 +131,7 @@ L2:
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; CHECK-LABEL: test_subs_tbnz
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; CHECK: subs
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; CHECK: b.lt
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; CHECK: b.mi
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; CHECK: ret
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define void @test_subs_tbnz(i32 %a, i32 %b, i32* %ptr) {
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entry:
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