RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2024-12-15 16:09:02 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Add SSE2 predicate to CVTPS2PD instructions. Doesn't matter much because there are no patterns in the instruction.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159127 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2012-06-25 06:51:42 +00:00
parent 13d89c7976
commit fd1753bedb
1 changed files with 3 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
lib/Target/X86/X86InstrSSE.td
View File

@ -2010,12 +2010,15 @@ def VCVTPS2PDYrm : I<0x5A, MRMSrcMem, (outs VR256:$dst), (ins f128mem:$src),
"vcvtps2pd\t{$src, $dst|$dst, $src}", [], "vcvtps2pd\t{$src, $dst|$dst, $src}", [],
IIC_SSE_CVT_PD_RM>, TB, VEX; IIC_SSE_CVT_PD_RM>, TB, VEX;
} }
let Predicates = [HasSSE2] in {
def CVTPS2PDrr : I<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), def CVTPS2PDrr : I<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
"cvtps2pd\t{$src, $dst|$dst, $src}", [], "cvtps2pd\t{$src, $dst|$dst, $src}", [],
IIC_SSE_CVT_PD_RR>, TB; IIC_SSE_CVT_PD_RR>, TB;
def CVTPS2PDrm : I<0x5A, MRMSrcMem, (outs VR128:$dst), (ins f64mem:$src), def CVTPS2PDrm : I<0x5A, MRMSrcMem, (outs VR128:$dst), (ins f64mem:$src),
"cvtps2pd\t{$src, $dst|$dst, $src}", [], "cvtps2pd\t{$src, $dst|$dst, $src}", [],
IIC_SSE_CVT_PD_RM>, TB; IIC_SSE_CVT_PD_RM>, TB;
}
let Predicates = [HasAVX] in { let Predicates = [HasAVX] in {
def : Pat<(int_x86_sse2_cvtps2pd VR128:$src), def : Pat<(int_x86_sse2_cvtps2pd VR128:$src),