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add a note, progress unblocked by PR8575 being fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124599 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2274,3 +2274,51 @@ llc time when it gets inlined, because we can use smaller transfers. This also
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avoids partial register stalls in some important cases.
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//===---------------------------------------------------------------------===//
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With PR8575 we're now generating better code for:
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static _Bool foo(int x) { return x == 1; }
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static _Bool bar(int x) { return x == 2; }
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static _Bool baz(int x) { return x == 3; }
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_Bool quux(int x) {
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return foo(x) || bar(x) || baz(x);
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}
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$ clang t.c -S -o - -O3 -mkernel -fomit-frame-pointer
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_quux: ## @quux
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## BB#0: ## %entry
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decl %edi
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cmpl $3, %edi
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movb $1, %al
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jb LBB0_2
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## BB#1: ## %lor.rhs
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xorb %al, %al
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LBB0_2: ## %lor.end
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movzbl %al, %eax
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andl $1, %eax
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ret
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But this should use a "setcc" instead of materializing a 0/1 value
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the hard way. This looks like #1: simplifycfg should transform the
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switch into a sub+icmp+branch, and an instcombine hack to replace
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the PHI with a zext of the branch condition. Here's the IR today:
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define zeroext i1 @quux(i32 %x) nounwind readnone ssp noredzone {
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entry:
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switch i32 %x, label %lor.rhs [
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i32 1, label %lor.end
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i32 2, label %lor.end
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i32 3, label %lor.end
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]
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lor.rhs: ; preds = %entry
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br label %lor.end
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lor.end: ; preds = %lor.rhs, %entry, %entry, %entry
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%0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
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ret i1 %0
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}
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//===---------------------------------------------------------------------===//
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