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Refactor code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86423 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -18,6 +18,9 @@
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#include "ARMGenInstrInfo.inc"
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#include "ARMMachineFunctionInfo.h"
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#include "ARMRegisterInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/Function.h"
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#include "llvm/GlobalValue.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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@ -897,6 +900,57 @@ ARMBaseInstrInfo::canFoldMemoryOperand(const MachineInstr *MI,
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return false;
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}
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void ARMBaseInstrInfo::
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reMaterialize(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SubIdx,
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const MachineInstr *Orig) const {
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DebugLoc dl = Orig->getDebugLoc();
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unsigned Opcode = Orig->getOpcode();
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switch (Opcode) {
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default: {
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MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
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MI->getOperand(0).setReg(DestReg);
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MBB.insert(I, MI);
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break;
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}
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case ARM::tLDRpci_pic:
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case ARM::t2LDRpci_pic: {
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MachineFunction &MF = *MBB.getParent();
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ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
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MachineConstantPool *MCP = MF.getConstantPool();
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unsigned CPI = Orig->getOperand(1).getIndex();
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const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
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assert(MCPE.isMachineConstantPoolEntry() &&
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"Expecting a machine constantpool entry!");
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ARMConstantPoolValue *ACPV =
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static_cast<ARMConstantPoolValue*>(MCPE.Val.MachineCPVal);
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unsigned PCLabelId = AFI->createConstPoolEntryUId();
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ARMConstantPoolValue *NewCPV = 0;
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if (ACPV->isGlobalValue())
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NewCPV = new ARMConstantPoolValue(ACPV->getGV(), PCLabelId,
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ARMCP::CPValue, 4);
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else if (ACPV->isExtSymbol())
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NewCPV = new ARMConstantPoolValue(MF.getFunction()->getContext(),
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ACPV->getSymbol(), PCLabelId, 4);
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else if (ACPV->isBlockAddress())
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NewCPV = new ARMConstantPoolValue(ACPV->getBlockAddress(), PCLabelId,
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ARMCP::CPBlockAddress, 4);
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else
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llvm_unreachable("Unexpected ARM constantpool value type!!");
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CPI = MCP->getConstantPoolIndex(NewCPV, MCPE.getAlignment());
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MachineInstrBuilder MIB = BuildMI(MBB, I, Orig->getDebugLoc(), get(Opcode),
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DestReg)
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.addConstantPoolIndex(CPI).addImm(PCLabelId);
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(*MIB).setMemRefs(Orig->memoperands_begin(), Orig->memoperands_end());
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break;
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}
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}
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MachineInstr *NewMI = prior(I);
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NewMI->getOperand(0).setSubReg(SubIdx);
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}
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bool ARMBaseInstrInfo::isIdentical(const MachineInstr *MI0,
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const MachineInstr *MI1,
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const MachineRegisterInfo *MRI) const {
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@ -264,6 +264,11 @@ public:
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const SmallVectorImpl<unsigned> &Ops,
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MachineInstr* LoadMI) const;
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virtual void reMaterialize(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SubIdx,
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const MachineInstr *Orig) const;
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virtual bool isIdentical(const MachineInstr *MI, const MachineInstr *Other,
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const MachineRegisterInfo *MRI) const;
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};
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@ -80,29 +80,26 @@ bool ARMInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
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}
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void ARMInstrInfo::
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reMaterialize(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SubIdx,
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const MachineInstr *Orig) const {
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DebugLoc dl = Orig->getDebugLoc();
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unsigned Opcode = Orig->getOpcode();
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switch (Opcode) {
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default: {
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MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
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MI->getOperand(0).setReg(DestReg);
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MBB.insert(I, MI);
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default:
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break;
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}
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case ARM::MOVi2pieces:
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case ARM::MOVi2pieces: {
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RI.emitLoadConstPool(MBB, I, dl,
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DestReg, SubIdx,
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Orig->getOperand(1).getImm(),
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(ARMCC::CondCodes)Orig->getOperand(2).getImm(),
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Orig->getOperand(3).getReg());
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break;
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MachineInstr *NewMI = prior(I);
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NewMI->getOperand(0).setSubReg(SubIdx);
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return;
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}
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}
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MachineInstr *NewMI = prior(I);
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NewMI->getOperand(0).setSubReg(SubIdx);
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return ARMBaseInstrInfo::reMaterialize(MBB, I, DestReg, SubIdx, Orig);
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}
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@ -13,13 +13,8 @@
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#include "Thumb1InstrInfo.h"
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#include "ARM.h"
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#include "ARMConstantPoolValue.h"
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#include "ARMGenInstrInfo.inc"
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#include "ARMMachineFunctionInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/Function.h"
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#include "llvm/GlobalValue.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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@ -268,53 +263,3 @@ foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
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return NewMI;
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}
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void Thumb1InstrInfo::reMaterialize(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SubIdx,
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const MachineInstr *Orig) const {
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DebugLoc dl = Orig->getDebugLoc();
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unsigned Opcode = Orig->getOpcode();
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switch (Opcode) {
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default: {
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MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
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MI->getOperand(0).setReg(DestReg);
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MBB.insert(I, MI);
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break;
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}
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case ARM::tLDRpci_pic: {
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MachineFunction &MF = *MBB.getParent();
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ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
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MachineConstantPool *MCP = MF.getConstantPool();
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unsigned CPI = Orig->getOperand(1).getIndex();
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const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
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assert(MCPE.isMachineConstantPoolEntry() &&
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"Expecting a machine constantpool entry!");
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ARMConstantPoolValue *ACPV =
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static_cast<ARMConstantPoolValue*>(MCPE.Val.MachineCPVal);
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unsigned PCLabelId = AFI->createConstPoolEntryUId();
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ARMConstantPoolValue *NewCPV = 0;
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if (ACPV->isGlobalValue())
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NewCPV = new ARMConstantPoolValue(ACPV->getGV(), PCLabelId,
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ARMCP::CPValue, 4);
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else if (ACPV->isExtSymbol())
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NewCPV = new ARMConstantPoolValue(MF.getFunction()->getContext(),
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ACPV->getSymbol(), PCLabelId, 4);
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else if (ACPV->isBlockAddress())
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NewCPV = new ARMConstantPoolValue(ACPV->getBlockAddress(), PCLabelId,
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ARMCP::CPBlockAddress, 4);
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else
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llvm_unreachable("Unexpected ARM constantpool value type!!");
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CPI = MCP->getConstantPoolIndex(NewCPV, MCPE.getAlignment());
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MachineInstrBuilder MIB = BuildMI(MBB, I, Orig->getDebugLoc(), get(Opcode),
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DestReg)
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.addConstantPoolIndex(CPI).addImm(PCLabelId);
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(*MIB).setMemRefs(Orig->memoperands_begin(), Orig->memoperands_end());
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break;
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}
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}
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MachineInstr *NewMI = prior(I);
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NewMI->getOperand(0).setSubReg(SubIdx);
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}
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@ -76,10 +76,6 @@ public:
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MachineInstr* LoadMI) const {
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return 0;
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}
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void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SubIdx,
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const MachineInstr *Orig) const;
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};
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}
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@ -17,10 +17,6 @@
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#include "ARMAddressingModes.h"
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#include "ARMGenInstrInfo.inc"
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#include "ARMMachineFunctionInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/Function.h"
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#include "llvm/GlobalValue.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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@ -137,55 +133,6 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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ARMBaseInstrInfo::loadRegFromStackSlot(MBB, I, DestReg, FI, RC);
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}
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void Thumb2InstrInfo::reMaterialize(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SubIdx,
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const MachineInstr *Orig) const {
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DebugLoc dl = Orig->getDebugLoc();
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unsigned Opcode = Orig->getOpcode();
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switch (Opcode) {
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default: {
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MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
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MI->getOperand(0).setReg(DestReg);
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MBB.insert(I, MI);
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break;
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}
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case ARM::t2LDRpci_pic: {
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MachineFunction &MF = *MBB.getParent();
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ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
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MachineConstantPool *MCP = MF.getConstantPool();
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unsigned CPI = Orig->getOperand(1).getIndex();
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const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
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assert(MCPE.isMachineConstantPoolEntry() &&
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"Expecting a machine constantpool entry!");
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ARMConstantPoolValue *ACPV =
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static_cast<ARMConstantPoolValue*>(MCPE.Val.MachineCPVal);
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unsigned PCLabelId = AFI->createConstPoolEntryUId();
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ARMConstantPoolValue *NewCPV = 0;
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if (ACPV->isGlobalValue())
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NewCPV = new ARMConstantPoolValue(ACPV->getGV(), PCLabelId,
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ARMCP::CPValue, 4);
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else if (ACPV->isExtSymbol())
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NewCPV = new ARMConstantPoolValue(MF.getFunction()->getContext(),
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ACPV->getSymbol(), PCLabelId, 4);
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else if (ACPV->isBlockAddress())
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NewCPV = new ARMConstantPoolValue(ACPV->getBlockAddress(), PCLabelId,
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ARMCP::CPBlockAddress, 4);
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else
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llvm_unreachable("Unexpected ARM constantpool value type!!");
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CPI = MCP->getConstantPoolIndex(NewCPV, MCPE.getAlignment());
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MachineInstrBuilder MIB = BuildMI(MBB, I, Orig->getDebugLoc(), get(Opcode),
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DestReg)
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.addConstantPoolIndex(CPI).addImm(PCLabelId);
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(*MIB).setMemRefs(Orig->memoperands_begin(), Orig->memoperands_end());
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break;
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}
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}
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MachineInstr *NewMI = prior(I);
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NewMI->getOperand(0).setSubReg(SubIdx);
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}
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void llvm::emitT2RegPlusImmediate(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MBBI, DebugLoc dl,
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unsigned DestReg, unsigned BaseReg, int NumBytes,
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unsigned DestReg, int FrameIndex,
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const TargetRegisterClass *RC) const;
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void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SubIdx,
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const MachineInstr *Orig) const;
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/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
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/// such, whenever a client has an instance of instruction info, it should
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/// always be able to get register info as well (through this method).
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