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Revert "[ARM] Merging 64-bit divmod lib calls into one"

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This reverts commit r262507, which broke some ARM buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262594 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Renato Golin 2016-03-03 08:57:44 +00:00
parent 457254d413
commit ff17c53224
3 changed files with 2 additions and 14 deletions
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3
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -2153,9 +2153,8 @@ SDValue DAGCombiner::useDivRem(SDNode *Node) {
if (Node->use_empty()) if (Node->use_empty())
return SDValue(); // This is a dead node, leave it alone. return SDValue(); // This is a dead node, leave it alone.
// DivMod lib calls can still work on non-legal types if using lib-calls.
EVT VT = Node->getValueType(0); EVT VT = Node->getValueType(0);
if (VT.isVector() || !VT.isInteger()) if (!TLI.isTypeLegal(VT))
return SDValue(); return SDValue();
unsigned Opcode = Node->getOpcode(); unsigned Opcode = Node->getOpcode();

9
lib/Target/ARM/ARMISelLowering.cpp
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@ -809,8 +809,6 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::SDIVREM, MVT::i32, Custom); setOperationAction(ISD::SDIVREM, MVT::i32, Custom);
setOperationAction(ISD::UDIVREM, MVT::i32, Custom); setOperationAction(ISD::UDIVREM, MVT::i32, Custom);
setOperationAction(ISD::SDIVREM, MVT::i64, Custom);
setOperationAction(ISD::UDIVREM, MVT::i64, Custom);
} else { } else {
setOperationAction(ISD::SDIVREM, MVT::i32, Expand); setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
setOperationAction(ISD::UDIVREM, MVT::i32, Expand); setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
@ -7056,13 +7054,6 @@ void ARMTargetLowering::ReplaceNodeResults(SDNode *N,
case ISD::UREM: case ISD::UREM:
Res = LowerREM(N, DAG); Res = LowerREM(N, DAG);
break; break;
case ISD::SDIVREM:
case ISD::UDIVREM:
Res = LowerDivRem(SDValue(N, 0), DAG);
assert(Res.getNumOperands() == 2 && "DivRem needs two values");
Results.push_back(Res.getValue(0));
Results.push_back(Res.getValue(1));
return;
case ISD::READCYCLECOUNTER: case ISD::READCYCLECOUNTER:
ReplaceREADCYCLECOUNTER(N, Results, DAG, Subtarget); ReplaceREADCYCLECOUNTER(N, Results, DAG, Subtarget);
return; return;

4
test/CodeGen/ARM/divmod-eabi.ll
View File

@ -79,6 +79,7 @@ entry:
ret i32 %add2 ret i32 %add2
} }
; FIXME: AEABI is not lowering long u/srem into u/ldivmod
define i64 @longf(i64 %a, i64 %b) { define i64 @longf(i64 %a, i64 %b) {
; EABI-LABEL: longf: ; EABI-LABEL: longf:
; DARWIN-LABEL: longf: ; DARWIN-LABEL: longf:
@ -86,9 +87,6 @@ entry:
%div = sdiv i64 %a, %b %div = sdiv i64 %a, %b
%rem = srem i64 %a, %b %rem = srem i64 %a, %b
; EABI: __aeabi_ldivmod ; EABI: __aeabi_ldivmod
; EABI-NEXT: adds r0
; EABI-NEXT: adc r1
; EABI-NOT: __aeabi_ldivmod
; DARWIN: ___divdi3 ; DARWIN: ___divdi3
; DARWIN: mov [[div1:r[0-9]+]], r0 ; DARWIN: mov [[div1:r[0-9]+]], r0
; DARWIN: mov [[div2:r[0-9]+]], r1 ; DARWIN: mov [[div2:r[0-9]+]], r1