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fix rdar://9289583 - fast isel should handle non-canonical commutative binops
allowing us to fold the immediate into the 'and' in this case: int test1(int i) { return 8&i; } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129653 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -122,10 +122,9 @@ unsigned FastISel::getRegForValue(const Value *V) {
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// only locally. This is because Instructions already have the SSA
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// def-dominates-use requirement enforced.
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DenseMap<const Value *, unsigned>::iterator I = FuncInfo.ValueMap.find(V);
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if (I != FuncInfo.ValueMap.end()) {
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unsigned Reg = I->second;
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return Reg;
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}
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if (I != FuncInfo.ValueMap.end())
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return I->second;
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unsigned Reg = LocalValueMap[V];
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if (Reg != 0)
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return Reg;
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@ -331,6 +330,26 @@ bool FastISel::SelectBinaryOp(const User *I, unsigned ISDOpcode) {
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return false;
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}
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// Check if the first operand is a constant, and handle it as "ri". At -O0,
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// we don't have anything that canonicalizes operand order.
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if (ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(0)))
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if (isa<Instruction>(I) && cast<Instruction>(I)->isCommutative()) {
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unsigned Op1 = getRegForValue(I->getOperand(1));
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if (Op1 == 0) return false;
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bool Op1IsKill = hasTrivialKill(I->getOperand(1));
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unsigned ResultReg = FastEmit_ri(VT.getSimpleVT(), VT.getSimpleVT(),
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ISDOpcode, Op1, Op1IsKill,
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CI->getZExtValue());
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if (ResultReg != 0) {
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// We successfully emitted code for the given LLVM Instruction.
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UpdateValueMap(I, ResultReg);
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return true;
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}
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}
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unsigned Op0 = getRegForValue(I->getOperand(0));
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if (Op0 == 0)
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// Unhandled operand. Halt "fast" selection and bail.
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14
test/CodeGen/X86/fast-isel-x86-64.ll
Normal file
14
test/CodeGen/X86/fast-isel-x86-64.ll
Normal file
@ -0,0 +1,14 @@
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; RUN: llc < %s | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-darwin10.0.0"
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; Make sure that fast-isel folds the immediate into the binop even though it
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; is non-canonical.
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define i32 @test1(i32 %i) nounwind ssp {
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%and = and i32 8, %i
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ret i32 %and
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}
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; CHECK: test1:
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; CHECK: andl $8,
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