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Author SHA1 Message Date
Benjamin Kramer
59a4f9af0a Fix a silly off by one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135842 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-23 03:04:46 +00:00
Benjamin Kramer
a397a11c7c We always bounds check the bit set, there is no need to emit zero bytes at the end. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135841 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-23 02:49:37 +00:00
Benjamin Kramer
71883edee2 Add more constness. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135838 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-23 01:40:15 +00:00
NAKAMURA Takumi
883d99f70b ARMMCTargetDesc.h: Fixup to add DataTypes.h, or uint32_t would be unavailable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135837 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-23 01:16:22 +00:00
Benjamin Kramer
9df8567548 Turn the DenseSet in MCRegisterClass into a tblgenerated bit field. This should be faster and smaller. 
Goodbye static ctors and dtors!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135836 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-23 00:47:49 +00:00
Benjamin Kramer
f496d68493 Give TargetRegisterClass a pointer to the MCRegisterClass and use it to access its data. 
This makes TargetRegisterClass slightly slower. Next step will be making contains faster.
Eventually TargetRegisterClass will be killed entirely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135835 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-23 00:47:46 +00:00
Evan Cheng
a7cfc08ebe Move TargetAsmParser.h TargetAsmBackend.h and TargetAsmLexer.h to MC where they belong. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135833 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-23 00:45:41 +00:00
NAKAMURA Takumi
7decee357b CMake: Fix LLVM_NATIVE_TARGETMC in config.h.cmake. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135832 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-23 00:45:23 +00:00
NAKAMURA Takumi
4aa8fe8b24 config.h.cmake: Reorder along config.h.in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135831 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-23 00:45:16 +00:00
Andrew Trick
2045ce154a Move trip count discovery outside of the generic LoopUnroll helper. This 
removes its dependence on canonical induction variables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135829 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-23 00:33:05 +00:00
Andrew Trick
ba03377fa1 whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135828 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-23 00:29:16 +00:00
Evan Cheng
7f8dff6571 createXXXMCCodeGenInfo should be static. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135826 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-23 00:01:04 +00:00
Evan Cheng
be74029f44 Sink ARM mc routines into MCTargetDesc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135825 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-23 00:00:19 +00:00
Jim Grosbach
4a5ffb399f ARM SSAT instruction 5-bit immediate handling. 
The immediate is in the range 1-32, but is encoded as 0-31 in a 5-bit bitfield.
Update the representation such that we store the operand as 0-31, allowing us
to remove the encoder method and the special case handling in the disassembler.
Update the assembly parser and the instruction printer accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135823 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 23:16:18 +00:00
Dan Gohman
4428069f10 Move the last uses of RetainFunc etc. over to using getRetainCallee() etc. 
so that a declaration for objc_retain is created when needed if it doesn't
already exist. rdar://9825114.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135821 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 22:29:21 +00:00
Oscar Fuentes
1608637bbd Teach cmake configured headers about LLVM_NATIVE_TARGETMC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135820 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 22:21:47 +00:00
Jim Grosbach
6ab4e3dd23 Add FIXME 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135819 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 22:15:38 +00:00
Jim Grosbach
0e76edf8c0 ARM encoding and assembly parsing tests for SMULWB, SMULWT, SMUSD and SMUSDX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135818 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 22:13:00 +00:00
Jim Grosbach
bf2845c0d8 ARM assembly parsing and encoding updates. 
Tests for SMULBB, SMLALBT, SMLALTB, SMLALTT, and SMULL. Fix parsing of SMULLS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135817 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 22:06:05 +00:00
Benjamin Kramer
256535f136 Use the enum value for RegClassIDs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135816 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 22:01:58 +00:00
Evan Cheng
e78085a3c0 Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo, 
InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135812 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 21:58:54 +00:00
Chris Lattner
6682746454 add section to ToC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135811 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 21:36:29 +00:00
Jim Grosbach
6808f21757 ARM assembly parsing and encoding tests. 
Add tests for SMLSD, SMLSDX, SMLSLD, SMLSLDX, SMMLA, SMMLAR, SMMLS, SMMLSR,
SMMUL, SMMULR, SMUAD and SMUADX.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135810 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 21:34:56 +00:00
Chris Lattner
3b4f4179cd write the long-overdue strings section of the data structure guide. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135809 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 21:34:12 +00:00
Bill Wendling
1424c3c3e6 Emit the __compact_unwind section first. If there are any frames which weren't 
emitted, emit them next as CIE/FDEs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135807 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 21:18:59 +00:00
Bill Wendling
1359c6d718 Add a method to set the compact unwind info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135806 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 21:17:05 +00:00
Bill Wendling
dda1bdc962 Add a method to get the list of FrameInfos. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135805 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 21:16:32 +00:00
Bruno Cardoso Lopes
bb37dcd66f Fix test check! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135802 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 20:55:28 +00:00
Bruno Cardoso Lopes
dad38638e1 Fix PR10422 by adding the necessary AVX UCOMISD memory versions to 
load folding logic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135801 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 20:53:20 +00:00
Jim Grosbach
44a456332f ARM assembly parsing and encoding tests for SMLAWB/SMLAWT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135800 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 20:51:24 +00:00
Chris Lattner
7314a20a59 move the section for string-like containers to follow the section for sequential containers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135799 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 20:46:49 +00:00
Jim Grosbach
ce501030d9 ARM assembly parsing and encoding tests. 
Tests for SMLAL, SMLALBB, SMLALBT, SMLALTB, SMLALTT, SMLALD, and SMLALDX
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135798 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 20:30:40 +00:00
Jim Grosbach
b544f68b70 ARM assembly parsing and encoding of SMLAL instruction. 
Fix parsing of carry-setting variant SMLALS and add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135797 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 20:18:21 +00:00
Jim Grosbach
b206daaec1 ARM encoding and assembly parsing of SMLAD{X} instructions. 
Fix encoding of destination register. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135796 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 20:11:20 +00:00
Jim Grosbach
0ffd4a09df ARM testcases for assembly parsing and encoding SMLA* instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135795 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 20:01:34 +00:00
Bruno Cardoso Lopes
8360b5fa81 Add v8f32->v8i32 bitcast. Fixes PR10440 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135794 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 19:51:02 +00:00
Rafael Espindola
23e31011fb Turn shuffles into unpacks for VT == MVT::v2i64 and MVT::v2f64 
too. Patch by Jeff Muizelaar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135789 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 18:56:05 +00:00
Dan Gohman
6e5fda213f Fix x86's XALUO lowering to return its replacement values instead 
of doing the RAUW calls for the overflow value itself. This makes
it more consistent with how the rest of LegalizeDAG works.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135788 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 18:45:15 +00:00
Benjamin Kramer
a503ede94b llvm-objdump: Don't ignore errors from raw_fd_ostream. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135787 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 18:35:11 +00:00
Benjamin Kramer
83a162ef85 llvm-objdump: Skip branches that leave the current function. 
In "normal" code these only happen when disassembling data, so we
won't lose anything if we just drop them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135786 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 18:35:09 +00:00
Owen Anderson
e0a03143df Fix test failures caused by my so_reg refactoring. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135785 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 18:30:30 +00:00
Jim Grosbach
7c9fbc0340 ARM assembly parsing and encoding for SMC instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135782 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 18:13:31 +00:00
Jim Grosbach
7931df3d74 Clean up a few more comments. 
These instruction definitions are for the assembler, too, not just the
disassembler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135781 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 18:06:01 +00:00
Jim Grosbach
248e6c328c ARM encoding and assembly parsing tests. 
Add tests for SHADD8, SHADD16, SHASX, SHSUB8, and SHSUB16.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135780 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 18:04:48 +00:00
Jim Grosbach
0fdf6ccf17 Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135779 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 18:04:10 +00:00
Jim Grosbach
0632247818 Thumb assembly support for SETEND instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135778 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 17:52:23 +00:00
Jim Grosbach
53a89d6f38 Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135777 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 17:46:13 +00:00
Jim Grosbach
c27d4f9ea0 ARM assembly parsing and encoding for SETEND instruction. 
Add parsing and diagnostics for malformed inputs. Tests for diagnostics and
for correct encodings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135776 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 17:44:50 +00:00
Jim Grosbach
9076b6e8f4 ARM assembly parsing and encoding tests for SEL instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135772 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 16:59:33 +00:00
Jim Grosbach
6c1bb77992 Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135771 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-22 16:59:04 +00:00