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04677a3b49
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57 Commits

Author SHA1 Message Date
Evan Cheng
04677a3b49 Recognize target instruction flag 'isReMaterializable'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35159 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 06:20:37 +00:00
Jim Laskey
a683f9ba13 Files missing from LABEL check in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33539 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 17:29:20 +00:00
Bill Wendling
f5da13367f What should be the last unnecessary <iostream>s in the library. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 22:21:48 +00:00
Evan Cheng
fb1aab0673 Add opcode to TargetInstrDescriptor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31804 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 01:46:27 +00:00
Chris Lattner
0bb75004ff ADd support for adding constraints to suboperands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31748 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 02:38:17 +00:00
Chris Lattner
f196839562 allow ptr_rc to explicitly appear in an instructions operand list, it doesn't 
have to be a subpart of a complex operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31618 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 02:01:40 +00:00
Evan Cheng
a1fd6504aa Remove M_2_ADDR_FLAG. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31583 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 02:22:54 +00:00
Chris Lattner
d9a7f4db5f Mark predicate operands as such in operand info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31483 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-06 23:53:31 +00:00
Chris Lattner
a0cca4ae26 simplify the way operand flags and constraints are handled, making it easier 
to extend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31481 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-06 23:49:51 +00:00
Chris Lattner
a818e92f8b recognize ppc's blr instruction as predicated 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31480 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-06 21:44:54 +00:00
Evan Cheng
c51737f46f Clean up some code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31451 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-04 09:40:23 +00:00
Evan Cheng
e2ba897588 Add operand constraints to TargetInstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31333 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-01 00:27:05 +00:00
Jim Laskey
cd4317efcf Eliminate data relocations by using NULL instead of global empty list. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29250 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-21 21:15:20 +00:00
Jim Laskey
60f09928a0 Use an enumeration to eliminate data relocations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29249 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-21 20:57:35 +00:00
Evan Cheng
8d3af5e7d0 Instructions with variable operands (variable_ops) can have a number required 
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
                "call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.

Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28791 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 07:22:16 +00:00
Evan Cheng
21d03f2de0 lib/Target/Target.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28386 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-18 20:42:07 +00:00
Evan Cheng
9812f1ca97 Noop instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28241 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 07:47:00 +00:00
Evan Cheng
108714c14f Set isStore of instructions with ISD::TRUNCSTORE root node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28075 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 02:08:34 +00:00
Chris Lattner
eff5c36238 Put instruction names into the first non TargetInstrInfo namespace found. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28043 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 23:46:16 +00:00
Evan Cheng
afba446d99 Formating 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28036 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 09:30:17 +00:00
Evan Cheng
6f6360d9ab Mark instructions whose pattern is (store ...) isStore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28032 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 09:04:20 +00:00
Chris Lattner
719c2fc97f Don't fill in fields that no longer exist. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27898 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 18:32:22 +00:00
Chris Lattner
f52e2618f3 If we want to emit things in enum order, use getInstructionsByEnumValue to 
get the order, don't compute it ourselves.

Don't emit stuff like (14<<0), emit 14 instead.

Don't attempt to get target properties for builtin instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25672 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 01:44:09 +00:00
Duraid Madina
42d24c71df almost got the HP-UX tester up.. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25051 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-30 14:56:37 +00:00
Chris Lattner
65303d6bd7 Teach tblgen about instruction operands that have multiple MachineInstr 
operands, digging into them to find register values (used on X86).  Patch
by Evan Cheng!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24424 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-19 07:05:57 +00:00
Jim Laskey
6cee630070 Allow itineraries to be passed through the Target Machine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24139 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-01 20:06:59 +00:00
Jeff Cohen
cb366d980a Keep VC++ happy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24137 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-01 18:04:06 +00:00
Jim Laskey
b5a0c0ee05 Emit itinerary class in instruction info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24122 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-31 17:16:46 +00:00
Chris Lattner
366080c5e6 Switch more code over to using getValueAsListOfDefs. Look at all the -'s. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24074 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-28 22:59:53 +00:00
Chris Lattner
5f89bf0f9d spell this variable right 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23095 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-26 20:42:52 +00:00
Chris Lattner
8b50f9b8dc Expose a new flag to TargetInstrInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23094 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-26 20:40:46 +00:00
Chris Lattner
9fdd6e3f50 add a marker at the end of the instruction enum list 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23090 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-26 20:17:00 +00:00
Chris Lattner
8d30c23d26 Emit this: 
static const TargetOperandInfo OperandInfo6[] = { { &PPC32::CRRCRegClass }, { 0 }, };

instead of this:

static const TargetOperandInfo OperandInfo6[] = { { PPC32::CRRCRegisterClass }, { 0 }, };

For operand information, which does not require dynamic (startup-time)
initialization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22931 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 20:29:14 +00:00
Chris Lattner
d5aa3e26bb Emit real operand info for instructions. This currently works but is bad 
in one way: the generated tables require dynamic initialization for the
register classes.  This will be fixed in a future patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22919 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:46:26 +00:00
Chris Lattner
0e384b66a7 For now, just emit empty operand info structures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22910 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 16:57:28 +00:00
Chris Lattner
d98958f4bd now that all of the targets are clean w.r.t. the number of operands for each 
instruction defined, actually emit this to the InstrInfoDescriptor, which
allows an assert in the machineinstrbuilder to do some checking for us,
and is required by the dag->dag emitter


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22895 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:59:49 +00:00
Chris Lattner
f372ae6ebc revert this change, which causes breakage, temporarily 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22880 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 22:12:31 +00:00
Chris Lattner
a3ac88d8ab When emitting implicit use/def lists, only emit each unique list once. Though 
LLVM is able to merge identical static const globals, GCC isn't, and this caused
some bloat in the generated data.  This has a marginal effect on PPC, shrinking
the implicit sets from 10->4, but shrinks X86 from 179 to 23, a much bigger
reduction.

This should speed up the register allocator as well by reducing the dcache
footprint for this static data.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22879 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 21:36:47 +00:00
Chris Lattner
dcfa353d74 Fill in the numOperands field of the TargetInstrDescriptor struct from the 
.td file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22873 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 19:45:37 +00:00
Misha Brukman
3da94aec4d Remove trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21428 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-22 00:00:37 +00:00
Chris Lattner
d648867173 Refactor code for numbering instructions into CodeGenTarget. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19758 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-22 18:58:51 +00:00
Chris Lattner
aad75aa1a2 Expose isConvertibleToThreeAddress and isCommutable bits to the code generator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19243 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-02 02:29:04 +00:00
Nate Begeman
cdd66b524f Add support for the isLoad and isStore flags, needed by the instruction scheduler 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16554 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-28 21:01:45 +00:00
Chris Lattner
5b71d3af35 Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAG 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16553 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-28 18:38:01 +00:00
Chris Lattner
2c38413b3f Do not #include files into the llvm namespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15849 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 03:08:28 +00:00
Chris Lattner
2d12b2cf75 Instructions no longer need to have names. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15399 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-01 08:38:17 +00:00
Chris Lattner
ec3524064c Add, and start using, the CodeGenInstruction class. This class represents 
an instance of the Instruction tablegen class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15385 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-01 05:04:00 +00:00
Chris Lattner
803a5f6ecb Rename CodeGenWrappers.(cpp|h) -> CodeGenTarget.(cpp|h) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15382 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-01 04:04:35 +00:00
Chris Lattner
2082ebe8b3 Finegrainify namespacification 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15381 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-01 03:55:39 +00:00
Chris Lattner
58505994cf Support new flag 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15355 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-31 02:07:26 +00:00