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78 Commits

Author SHA1 Message Date
Craig Topper
c0dae440e6 Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222801 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-11-26 00:46:26 +00:00
Job Noorman
77f923cfc1 Drop the W postfix on the 16-bit registers. 
This ensures the inline assembly register constraints are properly recognised in
TargetLowering::getRegForInlineAsmConstraint.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217479 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-09-10 06:58:14 +00:00
Anton Korobeynikov
c7c4a7867c Use conventional syntax for branches. 
Patch by Job!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186291 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-14 18:19:44 +00:00
Jakob Stoklund Olesen
294014e158 Move MRI liveouts to MSP430 return instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174411 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-05 18:12:06 +00:00
Jakob Stoklund Olesen
68c10a2ff7 Remove variable_ops from call instructions in most targets. 
Call instructions are no longer required to be variadic, and
variable_ops should only be used for instructions that encode a variable
number of arguments, like the ARM stm/ldm instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160189 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-13 20:44:29 +00:00
Jia Liu
31d157ae1a Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-18 12:03:15 +00:00
Chris Lattner
036609bd7d Flag -> Glue, the ongoing saga 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122513 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 18:28:41 +00:00
Chris Lattner
f8cbde46fb fix breakage from r98938 by correctly marking msp430 calls as variadic. 
Patch by Ben Ransford!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106722 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-24 06:46:50 +00:00
Eric Christopher
f704408bf7 Remove isTwoAddress from MSP430. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106455 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-21 20:07:30 +00:00
Eric Christopher
658ebcc7ec Make 80-column. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106448 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-21 18:56:55 +00:00
Anton Korobeynikov
1b17614a72 Do folding for indirect branches, where possible 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102836 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-01 12:28:21 +00:00
Anton Korobeynikov
69d5b48bc3 Implement indirect branches on MSP430 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102835 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-01 12:04:32 +00:00
Anton Korobeynikov
650a8e49f9 Long branch target oparands are not pc-rel. 
This should fix PR6603.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102834 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-01 12:04:22 +00:00
Dan Gohman
bc9d98b52d The mayHaveSideEffects flag is no longer used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97348 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-27 23:47:46 +00:00
Chris Lattner
518bb53485 move target-independent opcodes out of TargetInstrInfo 
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 19:54:29 +00:00
Anton Korobeynikov
702adaba6d Add branch relaxation pass (shamelessly stolen from PPC). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93554 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 21:19:05 +00:00
Anton Korobeynikov
05011a8aba Provide instruction sizes & encoding. No opcodes yet (but not needed so far). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93553 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 21:18:39 +00:00
Anton Korobeynikov
cb50e0bd60 Enable bit tests and setcc stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93552 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 21:18:18 +00:00
Anton Korobeynikov
f7ed979257 Fix cmp emission on msp430: we definitely should turn stuff like 
"icmp lhs, rhs" into "cmp rhs, lhs". This should fix PR5979.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93496 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 01:29:49 +00:00
Anton Korobeynikov
2625de35ed Implement variable-width shifts. 
No testcase yet - it seems we're exposing generic codegen bugs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91221 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-12 18:55:37 +00:00
Anton Korobeynikov
9aa1ec87b0 Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90819 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-08 01:03:04 +00:00
Anton Korobeynikov
e662f7a8b2 Initial codegen support for MSP430 ISRs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90739 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-07 02:27:53 +00:00
Anton Korobeynikov
ef4e604603 Drop unsupported imm operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89573 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-22 01:13:54 +00:00
Dan Gohman
adaace8aa8 Set isBarrier = 1 on return instructions, as they are control barriers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86851 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-11 18:11:07 +00:00
Anton Korobeynikov
f0b47b7f6d Add and-not (bic) patterns. Based heavily on patch by Brian Lucas! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86471 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-08 15:33:12 +00:00
Anton Korobeynikov
830fe7bc2d Move OR patterns upper to all logical stuff. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86470 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-08 15:32:44 +00:00
Anton Korobeynikov
ff2c186d59 Some nice peephole patterns. Based on patch by Brian Lucas! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86469 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-08 15:32:28 +00:00
Anton Korobeynikov
764cfaabd2 Print tab before operand of jcc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86468 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-08 15:32:11 +00:00
Anton Korobeynikov
52f28e9b63 Fix invalid operand updates & implement post-inc memory operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86466 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-08 14:27:38 +00:00
Anton Korobeynikov
06ac0820a6 First try of the post-inc operands handling... Not fully worked, though :( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86386 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-07 17:15:25 +00:00
Anton Korobeynikov
6534f83ae8 Add some dummy support for post-incremented loads 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86385 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-07 17:15:06 +00:00
Dan Gohman
533297b58d Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a 
bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85517 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-29 18:10:34 +00:00
Anton Korobeynikov
8ecaf237e0 Distinguish between pcrel imm operands and 'normal' ones. Fix fixes gross weirdness of asmprinting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84710 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-21 00:13:25 +00:00
Anton Korobeynikov
436604d505 Add missed mem-mem move patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83812 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-11 23:03:53 +00:00
Anton Korobeynikov
c4be951ddc Implement proper asmprinting for the globals. This eliminates bogus "call" modifier and also adds support for offsets wrt globals. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83784 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-11 19:14:02 +00:00
Anton Korobeynikov
8f8e9f0830 It seems that OR operation does not affect status reg at all. 
Remove impdef of SRW. This fixes PR4779


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83739 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-10 22:17:47 +00:00
Anton Korobeynikov
1e0039d6cf Special constants as destinations does not work as expected - drop the patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78191 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 14:42:00 +00:00
Anton Korobeynikov
aceb620de8 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71975 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-17 10:15:22 +00:00
Anton Korobeynikov
9c11d21d90 Add imm-reg and imm-mem patters for cmp on msp430 
(imm is allowed to be source operand, not dest...)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71393 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-10 14:49:00 +00:00
Anton Korobeynikov
1cb0acee8a Add 8 bit select 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71235 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 18:50:26 +00:00
Anton Korobeynikov
87e3caf819 Handle implicit zext in a better way. Shamelessly stolen from x86 backend. 
Thanks for Dan Gohman for suggestion!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70782 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 15:50:18 +00:00
Anton Korobeynikov
1bb8cd723d Make handling of conditional stuff much more straightforward 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70767 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:19:09 +00:00
Anton Korobeynikov
1fcfb6b6d2 Temporary disable imm patterns for cmp. Actually, all cmp-related stuff (select_cc, setcc, br_cc). needs to be rethought 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70766 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:18:50 +00:00
Anton Korobeynikov
bf8ef3f29d Add 8bit shifts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70759 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:16:37 +00:00
Anton Korobeynikov
e699d0f549 Handle logical shift right (at least I hope so :) ) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70758 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:16:17 +00:00
Anton Korobeynikov
e375a7c768 Handle anyext 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70757 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:15:57 +00:00
Anton Korobeynikov
49ebc22784 Implement bswap 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70753 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:15:03 +00:00
Anton Korobeynikov
5d59f68ade Properly handle ExternalSymbol's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70752 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:14:46 +00:00
Anton Korobeynikov
b8f03c9578 Provide addc and subc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70748 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:13:34 +00:00
Anton Korobeynikov
ea54c9846b Add left shift 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70747 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:13:17 +00:00