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Author SHA1 Message Date
Bill Wendling
127f410c3a Add new line at end of file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140903 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 23:21:11 +00:00
Bill Wendling
e09b2a0d49 When inferring the pointer alignment, if the global doesn't have an initializer 
and the alignment is 0 (i.e., it's defined globally in one file and declared in
another file) it could get an alignment which is larger than the ABI allows for
that type, resulting in aligned moves being used for unaligned loads.

For instance, in file A.c:

   struct S s;

In file B.c:
   struct {
     // something long
   };
   extern S s;

   void foo() {
     struct S p = s;
     // ...
   }

this copy is a 'memcpy' which is turned into a series of 'movaps' instructions
on X86. But this is wrong, because 'struct S' has alignment of 4, not 16.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140902 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 23:19:55 +00:00
Nick Lewycky
8de34006cf Promote comment to doxycomment. Adjust whitespace. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140899 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 22:19:53 +00:00
Jakob Stoklund Olesen
c8e2bb68bb Store sub-class lists as a bit vector. 
This uses less memory and it reduces the complexity of sub-class
operations:

- hasSubClassEq() and friends become O(1) instead of O(N).

- getCommonSubClass() becomes O(N) instead of O(N^2).

In the future, TableGen will infer register classes.  This makes it
cheap to add them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140898 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 22:19:07 +00:00
Jakob Stoklund Olesen
b7359e384f Extract a slightly more general BitVector printer. 
This one can also print 32-bit groups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140897 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 22:18:54 +00:00
Jakob Stoklund Olesen
e27e1ca3c9 Move getCommonSubClass() into TRI. 
It will soon need the context.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140896 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 22:18:51 +00:00
Jakob Stoklund Olesen
f9a4bb78da Compute lists of super-classes in CodeGenRegisterClass. 
Use these lists instead of computing them on the fly in
RegisterInfoEmitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140895 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 22:18:45 +00:00
Jim Grosbach
f391e9f696 Correct for my over-eager delete finger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140892 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 22:02:45 +00:00
Akira Hatanaka
291512f96f Add definition of MipsELFObjectWriter. 
Patch by Reed Kotler at Mips Technologies.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140891 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 21:55:40 +00:00
Akira Hatanaka
09a2e0f794 Register the MC object streamer. 
Patch by Reed Kotler at Mips Technologies.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140887 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 21:29:38 +00:00
Akira Hatanaka
4b6ee7a352 Register Asm backend. Add functions to MipsAsmBackend. 
Patch by Reed Kotler at Mips Technologies.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140886 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 21:23:45 +00:00
Akira Hatanaka
82ea7314ca Add MCELFObjectTargetWriter and MCAsmBackend classes. 
Patch by Reed Kotler at Mips Technologies.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140885 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 21:04:02 +00:00
David Greene
90b6e346ee Test More Complicated Lists 
Test of indexing lists of lists of lists works.  This also exercises
some operators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140884 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 20:59:52 +00:00
David Greene
f6c8cbba4e Test VarListElementInit:: resolveListElementReference 
Add a TableGen test to check if indexing lists of lists works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140883 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 20:59:51 +00:00
David Greene
1045a594e6 Implement VarListElementInit:: resolveListElementReference 
Implement VarListElementInit:: resolveListElementReference so that
lists of lists can be indexed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140882 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 20:59:49 +00:00
Benjamin Kramer
310c9ea874 Update CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140879 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 20:44:33 +00:00
Akira Hatanaka
4520a10fdb Initial implementation of MipsMCCodeEmitter. 
Patch by Reed Kotler at Mips Technologies.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140878 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 20:40:03 +00:00
Jim Grosbach
68e05fb368 Don't modify constant in-place. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140875 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 19:58:46 +00:00
Andrew Trick
62e0590c0e Tracing or debug-printing a newly formed instruction should not crash. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140874 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 19:50:40 +00:00
Andrew Trick
18801ecd48 whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140873 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 19:48:58 +00:00
Akira Hatanaka
5773fd52ef Remove unnecessary checking of register operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140872 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 19:18:24 +00:00
Akira Hatanaka
c7bafe9241 Add definitions of Mips64 rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140870 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 18:51:46 +00:00
Jim Grosbach
cbf676b3ba float comparison to double 'zero' constant can just be a float 'zero.' 
InstCombine was incorrectly considering the conversion of the constant
zero to be unsafe.

We want to transform:
define float @bar(float %x) nounwind readnone optsize ssp {
  %conv = fpext float %x to double
  %cmp = fcmp olt double %conv, 0.000000e+00
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}

Into:
define float @bar(float %x) nounwind readnone optsize ssp {
  %cmp = fcmp olt float %x, 0.000000e+00   ; <---- This
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}


rdar://10215914


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140869 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 18:45:50 +00:00
Bill Wendling
d98f838284 Constify 'isLSDA' and move a method out-of-line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140868 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 18:42:06 +00:00
Jim Grosbach
0cc4a958f3 Tidy up. Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140865 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 18:09:53 +00:00
Jim Grosbach
6f09fcf5da ARM Darwin default relocation model is PIC. 
This matches clang, so default options in llc and friends are now closer to
clang's defaults.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140863 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 17:41:35 +00:00
Akira Hatanaka
a64556ffda isCommutable should be 0 for DSUBu. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140862 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 17:26:36 +00:00
Jim Grosbach
98602ac9a9 ARM Fixup valus for movt/movw are for the whole value. 
Remove an assert that was expecting only the relevant 16bit portion for
the fixup being handled. Also kill some dead code in the T2 portion.

rdar://9653509


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140861 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 17:23:05 +00:00
Akira Hatanaka
d80c13bfed Check values of immediate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140860 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 17:19:21 +00:00
Jakob Stoklund Olesen
7850dd0f25 Fix a bug in compare_numeric(). 
Thanks to Alexandru Dura and Jonas Paulsson for finding it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140859 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 17:03:55 +00:00
Duncan Sands
5bc93e782e Add forgotten tests that the cleanup flag is cleared if there 
is a catch-all landingpad clause.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140858 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 17:00:34 +00:00
Danil Malyshev
0ba3c0ab63 MCJIT initialization TargetData 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140856 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 16:40:10 +00:00
Justin Holewinski
f51b7e5d74 PTX: Various stylistic and code readability changes recommended by Jim Grosbach. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140855 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 14:36:36 +00:00
Justin Holewinski
8c1dac54f2 PTX: Add programmable rounding mode specifier for int <-> fp conversion instrs. 
Also take this opportunity to clean up the rounding mode pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140854 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 13:46:52 +00:00
Duncan Sands
0ad7b6e773 Inlining often produces landingpad instructions with repeated 
catch or repeated filter clauses.  Teach instcombine a bunch
of tricks for simplifying landingpad clauses.  Currently the
code only recognizes the GNU C++ and Ada personality functions,
but that doesn't stop it doing a bunch of "generic" transforms
which are hopefully fine for any real-world personality function.
If these "generic" transforms turn out not to be generic, they
can always be conditioned on the personality function.  Probably
someone should add the ObjC++ personality function.  I didn't as
I don't know anything about it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140852 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 13:12:16 +00:00
Torok Edwin
f16e2d4b2a some 3.0 API notes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140851 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 13:07:52 +00:00
Torok Edwin
d398bae0e0 Comment grammar fixes. 
thanks to Duncan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140850 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 13:07:47 +00:00
Justin Holewinski
c90e149ee4 PTX: Attempt to cleanup/unify the handling of FP rounding modes. This requires 
us to manually provide Pat<> definitions for all FP instruction patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140849 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 12:54:43 +00:00
Torok Edwin
10a11ecb59 Instead of crashing when MCAsmInfo is NULL, add an assert. 
This helps with porting code from 2.9 to 3.0 as TargetSelect.h changed location,
and if you include the old one by accident you will trigger this assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140848 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 12:31:57 +00:00
Akira Hatanaka
25a7d94e81 Mips64 shift instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140841 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 03:18:46 +00:00
Akira Hatanaka
f549ab7853 Mips64 arithmetic and logical instructions with one source register and 
immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140839 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 02:08:54 +00:00
Jim Grosbach
4ebbf7b8a8 ARM fix encoding of VMOV.f32 and VMOV.f64 immediates. 
Encode the immediate into its 8-bit form as part of isel rather than later,
which simplifies things for mapping the encoding bits, allows the removal
of the custom disassembler decoding hook, makes the operand printer trivial,
and prepares things more cleanly for handling these in the asm parser.

rdar://10211428



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140834 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 00:50:06 +00:00
Jakob Stoklund Olesen
203e0b17dd Precompute a bit vector of register sub-classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140827 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 00:10:40 +00:00
Jakob Stoklund Olesen
7dcaa5b0fb Order register classes topologically. 
All register classes are given a lower ID than their sub-classes.
Cliques are ordered alphabetically.

This will be used to simplify some sub-class operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140826 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 00:10:36 +00:00
Akira Hatanaka
a3defb07a0 Fill delay slot with useful instructions. Modified from Sparc's version of delay 
slot filler.

Patch by Reed Kotler at Mips Technologies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140825 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 23:52:13 +00:00
Bill Wendling
e00897c5a9 Create a machine basic block in the constant pool and retrieve the symbol for an MBB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140824 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 23:50:42 +00:00
Bill Wendling
4dd9b091cc Support creating a constant pool value for a machine basic block. 
This is used when we want to take the address of a machine basic block, but it's
not associated with a BB in LLVM IR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140823 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 23:48:44 +00:00
Nick Lewycky
48105286cb Fold two identical set lookups into one. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140821 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 23:40:12 +00:00
Jakob Stoklund Olesen
29f018cee6 Switch to ArrayRef<CodeGenRegisterClass*>. 
This makes it possible to allocate CodeGenRegisterClass instances
dynamically and reorder them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140816 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 22:28:37 +00:00
Dan Gohman
27e0666725 When eliminating unnecessary retain+autorelease on return values, 
handle the case where the retain is in a different basic block.
rdar://10210274.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140815 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 22:27:34 +00:00