129058 Commits

Author SHA1 Message Date
Krzysztof Parzyszek
1608a747d5 [Hexagon] Properly encode registers in duplex instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263980 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 20:13:33 +00:00
Krzysztof Parzyszek
2be5a89f8e [Hexagon] Fix reserving emergency spill slots for register scavenger
- R10 and R11 are not reserved registers.
- Check for reserved registers when finding unused caller-saved registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263977 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 19:57:08 +00:00
Dan Gohman
c13556c771 [WebAssembly] Implement the eqz instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263976 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 19:54:41 +00:00
Chad Rosier
dc7ed9fc0a [SLP] Remove unnecessary member variables by using container APIs.
This changes the debug output, but still retains its usefulness.
Differential Revision: http://reviews.llvm.org/D18324

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263975 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 19:47:44 +00:00
Colin LeMahieu
bb93856810 [llvm-objdump] Printing relocations in executable and shared object files. This partially reverts r215844 by removing test objdump-reloc-shared.test which stated GNU objdump doesn't print relocations, it does.
In executable and shared object ELF files, relocations in the file contain the final virtual address rather than section offset so this is adjusted to display section offset.

Differential revision: http://reviews.llvm.org/D15965

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263971 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 19:14:50 +00:00
Tom Stellard
1f213b9b37 AMDGPU/SI: Fix threshold calculation for branching when exec is zero
Summary:
When control flow is implemented using the exec mask, the compiler will
insert branch instructions to skip over the masked section when exec is
zero if the section contains more than a certain number of instructions.

The previous code would only count instructions in successor blocks,
and this patch modifies the code to start counting instructions in all
blocks between the start and end of the branch.

Reviewers: nhaehnle, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18282

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263969 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 18:56:58 +00:00
Chad Rosier
9c1ab0ea68 [AArch64] Add a helpful assert. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263965 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 18:04:10 +00:00
Matt Arsenault
ea35ca49f2 AMDGPU: Remove SignBitIsZero for mubuf scratch offsets
These instructions do not have the same negative base
address problem that DS instructions do on SI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263964 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 18:02:18 +00:00
Peter Collingbourne
f24c9d47b6 ARM: Better codegen for 64-bit compares.
This introduces a custom lowering for ISD::SETCCE (introduced in r253572)
that allows us to emit a short code sequence for 64-bit compares.

Before:

	push	{r7, lr}
	cmp	r0, r2
	mov.w	r0, #0
	mov.w	r12, #0
	it	hs
	movhs	r0, #1
	cmp	r1, r3
	it	ge
	movge.w	r12, #1
	it	eq
	moveq	r12, r0
	cmp.w	r12, #0
	bne	.LBB1_2
@ BB#1:                                 @ %bb1
	bl	f
	pop	{r7, pc}
.LBB1_2:                                @ %bb2
	bl	g
	pop	{r7, pc}

After:

	push	{r7, lr}
	subs	r0, r0, r2
	sbcs.w	r0, r1, r3
	bge	.LBB1_2
@ BB#1:                                 @ %bb1
	bl	f
	pop	{r7, pc}
.LBB1_2:                                @ %bb2
	bl	g
	pop	{r7, pc}

Saves around 80KB in Chromium's libchrome.so.

Some notes on this patch:

- I don't much like the ARMISD::BRCOND and ARMISD::CMOV combines I
  introduced (nothing else needs them). However, they are necessary in
  order to avoid poor codegen, and they seem similar to existing combines
  in other backends (e.g. X86 combines (brcond (cmp (setcc Compare))) to
  (brcond Compare)).

- No support for Thumb-1. This is in principle possible, but we'd need
  to implement ARMISD::SUBE for Thumb-1.

Differential Revision: http://reviews.llvm.org/D15256

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263962 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 18:00:02 +00:00
Renato Golin
faf3d27a21 [ARM] Add Cortex-A32 support
Adding Cortex-A32 as an available target in the ARM backend.

Patch by Sam Parker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263956 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 17:29:01 +00:00
Hemant Kulkarni
962167f0e2 [llvm-readobj] Impl GNU style symbols printing
Implements "readelf -sW and readelf -DsW"

Differential Revision: http://reviews.llvm.org/D18224

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263952 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 17:18:23 +00:00
Lang Hames
43f3f60fb4 [Orc] Switch RPC Procedure to take a function type, rather than an arg list.
No functional change, just a little more readable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263951 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 16:56:25 +00:00
Matt Arsenault
7c9226fea8 APFloat: Add frexp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263950 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 16:49:16 +00:00
Matt Arsenault
c8d042bec9 AMDGPU: Add frexp_mant intrinsic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263948 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 16:11:05 +00:00
Matt Arsenault
23f7a82592 Implement constant folding for bitreverse
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263945 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 15:00:35 +00:00
Chad Rosier
a4bb38c2a8 [AArch64] Fix a -Wdocumentation warning. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263942 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 13:43:58 +00:00
Silviu Baranga
872392e1a9 [IndVars] Fix PR26974: make sure replaceCongruentIVs doesn't break LCSSA
Summary:
replaceCongruentIVs can break LCSSA when trying to replace IV increments
since it tries to replace all uses of a phi node with another phi node
while both of the phi nodes are not necessarily in the processed loop.
This will cause an assert in IndVars.

To fix this, we add a check to make sure that the replacement maintains
LCSSA.

Reviewers: sanjoy

Subscribers: mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D18266

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263941 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 12:44:29 +00:00
Silviu Baranga
bec2ec108f [DAGCombine] Catch the case where extract_vector_elt can cause an any_ext while processing AND SDNodes
Summary:
extract_vector_elt can cause an implicit any_ext if the types don't
match. When processing the following pattern:

  (and (extract_vector_elt (load ([non_ext|any_ext|zero_ext] V))), c)

DAGCombine was ignoring the possible extend, and sometimes removing
the AND even though it was required to maintain some of the bits
in the result to 0, resulting in a miscompile.

This change fixes the issue by limiting the transformation only to
cases where the extract_vector_elt doesn't perform the implicit
extend.

Reviewers: t.p.northover, jmolloy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18247

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263935 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 11:43:46 +00:00
Elena Demikhovsky
ff9be37421 Fixed -mcpu flag
"core-avx" does not exist; I changed to "nehalem"


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263932 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 11:06:20 +00:00
Simon Pilgrim
9cba37e8d4 [X86][SSE] Add vector integer division by constant tests
Expanded tests and split into sdiv/srem and udiv/urem cases for 128 and 256 bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263917 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-20 21:46:58 +00:00
Jingyue Wu
eed77df1b6 [NVPTX] Adds a new address space inference pass.
Summary:
The old address space inference pass (NVPTXFavorNonGenericAddrSpaces) is unable
to convert the address space of a pointer induction variable. This patch adds a
new pass called NVPTXInferAddressSpaces that overcomes that limitation using a
fixed-point data-flow analysis (see the file header comments for details).

The new pass is experimental and not enabled by default. Users can turn
it on by setting the -nvptx-use-infer-addrspace flag of llc.

Reviewers: jholewinski, tra, jlebar

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D17965

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263916 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-20 20:59:20 +00:00
Davide Italiano
443693f33a [gold] Emit a diagnostic in case we fail to remove a file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263914 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-20 20:12:33 +00:00
Simon Pilgrim
cdda81445a [X86][SSE] Tidyup setTargetShuffleZeroElements to match computeZeroableShuffleElements
Based on feedback for D14261

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263911 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-20 17:43:07 +00:00
Simon Pilgrim
21f68df4a2 [X86][SSE] Detect zeroable shuffle elements from different value types
Improve computeZeroableShuffleElements to be able to peek through bitcasts to extract zero/undef values from BUILD_VECTOR nodes of different element sizes to the shuffle mask.

Differential Revision: http://reviews.llvm.org/D14261

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263906 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-20 15:45:42 +00:00
Igor Breger
121e8b9361 AVX512BW: Enable v32i1/v64i1 BUILD_VECTOR
Differential Revision: http://reviews.llvm.org/D18211

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263898 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-20 13:09:43 +00:00
George Rimar
81a0c97314 [ELF] Update x86_64 relocations to 0.99.8 ABI
Added: R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263894 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-20 09:45:08 +00:00
Craig Topper
2e8d041188 Suppress a -Wunused-variable warning in release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263892 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-20 01:17:54 +00:00
Michael Kuperstein
183d4c239a Use a range-based for loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263889 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-20 00:16:13 +00:00
Mehdi Amini
e6cda0e9bc Expose IRBuilder::CreateAtomicCmpXchg as LLVMBuildAtomicCmpXchg in the C API.
Summary: Also expose getters and setters in the C API, so that the change can be tested.

Reviewers: nhaehnle, axw, joker.eph

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18260

From: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263886 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 21:28:28 +00:00
Mehdi Amini
14e4632794 Const-correctness in libLTO
Looks like I was sloppy when bridging to C.
Thanks D. Blaikie for noticing!

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263885 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 21:28:18 +00:00
Saleem Abdulrasool
b6275da485 CodeGen: use range based for loop
Convert a loop to use a range based style loop.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263884 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 16:35:32 +00:00
David Majnemer
649040b838 [SimplifyLibCalls] Only consider sinpi/cospi functions within the same function
The sinpi/cospi can be replaced with sincospi to remove unnecessary
computations.  However, we need to make sure that the calls are within
the same function!

This fixes PR26993.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263875 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 04:53:02 +00:00
David Majnemer
20e3af6f8a [InstCombine] Don't insert instructions before a catch switch
CatchSwitches are not splittable, we cannot insert casts, etc. before
them.

This fixes PR26992.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263874 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 04:39:52 +00:00
Mehdi Amini
4392249e77 Add a dependency from llvm-link to TransformUtils following r263860
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263873 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 03:12:54 +00:00
Davide Italiano
fef7414d58 [gold] Use early return to simplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263872 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 02:34:33 +00:00
Simon Pilgrim
0dac9cf06f Removed trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263871 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 02:05:33 +00:00
Mehdi Amini
8ff9043ade Fix a const_cast related warning in GCC in the C API for libLTO
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263870 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 01:24:23 +00:00
Mehdi Amini
991382f4d8 Add a comment on partial hashing of Metadata
Following r263866, on D. Blaikie suggestion.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263869 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 01:06:24 +00:00
Kostya Serebryany
bccbdac96f [libFuzzer] one more trophie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263868 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 01:05:33 +00:00
Mehdi Amini
bef5d7af6b Hash Metadata using pointer for MDString argument instead of value (NFC)
MDString are uniqued in the Context on creation, hashing the
pointer is less expensive than hashing the String itself.

Reviewers: dexonsmith
Differential Revision: http://reviews.llvm.org/D16560

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263867 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 01:02:34 +00:00
Mehdi Amini
343753f293 Compute some Debug Info Metadata hash key partially (NFC)
Summary:
This patch changes the computation of the hash key for DISubprogram to
be computed on a small subset of the fields. The hash is computed a
lot faster, but there might be more collision in the table.
However by carefully selecting the fields, colisions should be rare.

Using `opt` to load the IR for FastISelEmitter.cpp.o, with this patch:
 - DISubprogram::getImpl() goes from 28ms to 15ms.
 - DICompositeType::getImpl() goes from 6ms to 2ms
 - DIDerivedType::getImpl() goes from 18 to 12ms

Reviewers: dexonsmith

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16571

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263866 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 00:59:26 +00:00
Mehdi Amini
8268477130 Rework linkInModule(), making it oblivious to ThinLTO
Summary:
ThinLTO is relying on linkInModule to import selected function.
However a lot of "magic" was hidden in linkInModule and the IRMover,
who would rename and promote global variables on the fly.

This is moving to an approach where the steps are decoupled and the
client is reponsible to specify the list of globals to import.
As a consequence some test are changed because they were relying on
the previous behavior which was importing the definition of *every*
single global without control on the client side.
Now the burden is on the client to decide if a global has to be imported
or not.

Reviewers: tejohnson

Subscribers: joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D18122

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263863 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 00:40:31 +00:00
Mehdi Amini
e314781f09 Add a test for r263577: "Add missing error handling in llvm-lto"
On Rafael's suggestion!
(also fix a discrepancy between this error message format and the others)

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263860 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-19 00:17:32 +00:00
Manman Ren
d63e0d2742 [CXX_FAST_TLS] Fix issues in ARM.
We need to be careful on which registers can be explicitly handled
via copies. Prologue, Epilogue use physical registers and if one belongs
to the set of CSRsViaCopy, it will no longer be CSRed, since PEI overwrites
it after the explicit copies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263857 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-18 23:44:37 +00:00
Manman Ren
6b646dc5c5 [CXX_FAST_TLS] Disable tail call when calling conventions are mismatched.
Since CXX_FAST_TLS has a bigger set of CSRs, we don't tail call when caller
and callee have mismatched calling conventions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263856 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-18 23:41:51 +00:00
Manman Ren
2dadc1aa4d [CXX_FAST_TLS] fix issues with O0 on ARM, AArch64 and X86.
Since at O0, explicit copies via SplitCSR may not be removed even if
they are unnecessary, we choose not to use SplitCSR at O0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263855 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-18 23:38:49 +00:00
Duncan P. N. Exon Smith
a41843d067 AArch64: Don't modify other modules in AArch64PromoteConstant
Avoid modifying other modules in `AArch64PromoteConstant` when the
constant is `ConstantData` (a horrible accident, I'm sure, caught by an
experimental follow-up to r261464).

Previously, this walked through all the users of a constant, but that
reaches into other modules when the constant doesn't depend transitively
on a `GlobalValue`!  Since we're walking instructions anyway, just
modify the instructions we actually see.

As a drive-by, instead of storing `Use` and getting the instructions
again via `Use::getUser()` (which is not a constantant time lookup),
store `std::pair<Instruction, unsigned>`.  Besides being cheaper, this
makes it easier to drop use-lists form `ConstantData` in the future.
(I threw this in because I was touching all the code anyway.)

Because the patch completely changes the traversal logic, it looks
like a rewrite of the pass, but the core logic is all the same (or
should be, minus the out-of-module changes).  In other words, there
should be NFC as long as the LLVMContext only has a single Module.

I didn't think of a good way to test this, but I hope to submit a patch
eventually that makes walking these use-lists illegal/impossible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263853 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-18 23:30:54 +00:00
Mike Aizatsky
dc0299a744 [sancov] clang-formatting SanitizerCoverage.cpp and fully pleasing clang-tidy.
Differential Revision: http://reviews.llvm.org/D18288

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263852 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-18 23:29:29 +00:00
Michael Kuperstein
03a784fdb1 Have DataLayout::isLegalInteger() accept uint64_t
While not strictly necessary, since we don't support large integer
types, this avoids bugs due to silent truncation from uint64_t to a
32-bit unsigned (e.g. DL.isLegalInteger(DL.getTypeSizeInBits(Ty) )

This fixes PR26972.

Differential Revision: http://reviews.llvm.org/D18258

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263850 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-18 23:19:29 +00:00
Mike Aizatsky
a87dfbab4c [sancov] typo fix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263849 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-18 22:46:10 +00:00