Tom Stellard
56077f5796
R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol table
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218776 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-01 17:15:17 +00:00
Vincent Lejeune
f57d692c11
R600: Move code handling literal folding into R600ISelLowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190644 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-12 23:44:53 +00:00
Vincent Lejeune
bb25a01d23
R600: Non vector only instruction can be scheduled on trans unit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189980 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 19:53:46 +00:00
Tom Stellard
6b88cdb34c
R600: Enable folding of inline literals into REQ_SEQUENCE instructions
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Tested-by: Aaron Watry <awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188517 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 01:11:55 +00:00
Tom Stellard
6b3f6a744a
Revert "R600: Non vector only instruction can be scheduled on trans unit"
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This reverts commit 98ce62780e
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187526 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 20:43:27 +00:00
Vincent Lejeune
98ce62780e
R600: Non vector only instruction can be scheduled on trans unit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187514 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 19:31:56 +00:00
Tom Stellard
1f67c63cb2
DAGCombiner: Pass the correct type to TargetLowering::isF(Abs|Neg)Free
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This commit also implements these functions for R600 and removes a test
case that was relying on the buggy behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187007 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 23:55:03 +00:00
Tom Stellard
a7eea0568c
R600: Use KCache for kernel arguments
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Reviewed-by: Vincent Lejeune <vljn at ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186918 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 01:48:18 +00:00
Vincent Lejeune
5ed88013e8
R600: Signed literals are 64bits wide
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180960 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-02 21:53:03 +00:00
Vincent Lejeune
92f24d403f
R600: Prettier asmPrint of Alu
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180956 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-02 21:52:30 +00:00
Benjamin Kramer
1cb47b9afe
Test case hygiene.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176772 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-09 18:25:40 +00:00
Tom Stellard
3ce2ec8478
R600: Emit function name in the AsmPrinter
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Emitting the function name allows us to check for it in the FileCheck
tests so we can make sure FileCheck is checking the output of the
correct function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 17:09:11 +00:00
Tom Stellard
f98f2ce29e
Add R600 backend
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A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 21:25:42 +00:00