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Author SHA1 Message Date
Reed Kotler
27210d215a Implement cfi_def_cfa_offset. "Make check" test case for this comming in the 
next few days but it's already tested a lot from test-suite and works fine.
This patch completes almost 100% pass of test-suite for mips 16.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170674 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:59:37 +00:00
Reed Kotler
0fd8313250 There is one more patch to finish large frames. Make sure we assert 
on code that has large frames which will not yet compile correctly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170673 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:57:00 +00:00
Jyotsna Verma
82a36e2b59 Add constant extender support to GP-relative load/store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170672 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:52:46 +00:00
Jyotsna Verma
39498d1ff0 Add TSFlags to ALU32 type instructions for constant-extender/Relationship maps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170671 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:45:39 +00:00
Reed Kotler
bacbf1c2cb set register class properly for mips16 here 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170669 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:06:35 +00:00
Rafael Espindola
399532b25a Undefine PPC harder. 
This was causing a build failure while trying to build on ppc ubuntu 12.10 with
cmake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170668 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 05:13:09 +00:00
Reed Kotler
c28ee9622a This assert is overly restrictive and does not work for mips16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170667 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 05:09:15 +00:00
Reed Kotler
1f23239c5b Turn on register scavenger for Mips 16 
We use an unused Mips 32 register for the emergency slot
instead of using the stack.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170665 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:44:58 +00:00
Akira Hatanaka
9bf571fe2c [mips] Refactor SLT (set on less than) instructions. Separate encoding 
information from the rest. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170664 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:27:52 +00:00
Akira Hatanaka
c23061547d [mips] Refactor unconditional branch instruction. Separate encoding information 
from the rest. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170663 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:22:39 +00:00
Akira Hatanaka
1e7739f614 [mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass 
parameter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170661 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:20:09 +00:00
Akira Hatanaka
77e85f367c [mips] Delete definition of CPRESTORE instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170660 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:15:30 +00:00
Akira Hatanaka
5c54025645 [mips] Refactor conditional branch instructions with one register operand. 
Separate encoding information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170659 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:13:23 +00:00
Richard Smith
488fdce982 Don't use isa<CallInst>(this) in the constructor for CallInst's base class. 
This has undefined behavior, because the classof implementation attempts to
access parts of the not-yet-constructed derived class. Found by clang
-fsanitize=vptr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170658 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:11:02 +00:00
Akira Hatanaka
c488901355 [mips] Refactor conditional branch instructions with two register operands. 
Separate encoding information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170657 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:10:13 +00:00
Reed Kotler
cef95f702a fix most of remaining issues with large frames. 
these patches are tested a lot by test-suite but
make check tests are forthcoming once the next
few patches that complete this are committed.
with the next few patches the pass rate for mips16 is
near 100%



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170656 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:07:42 +00:00
Akira Hatanaka
68fe665b9a [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy 
physical register $r1 to $r0.

GNU disassembler recognizes an "or" instruction as a "move", and this change
makes the disassembled code easier to read.

Original patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170655 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:06:06 +00:00
Richard Smith
ba836a2e80 Fix use-before-construction of X86TargetLowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170654 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:04:17 +00:00
Richard Smith
fe4ef2c2ae Don't use -1 as a value of an unsigned 7-bit enumeration; that has undefined 
behavior and violates the !range constraints we put on loads of this enum.
Found by clang -fsanitize=enum.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170653 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:02:58 +00:00
Richard Smith
e8ce626308 Don't leave IsUnsigned uninitialized in a default-constructed APSInt. Copying 
such a structure has undefined behavior. Caught by -fsanitize=bool.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170652 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:59:24 +00:00
Akira Hatanaka
2427773f2f [mips] Change the order of template parameters. Move the default parameters to 
the end. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170651 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:52:08 +00:00
Akira Hatanaka
cdc0c59d1e [mips] Refactor shift instructions with register operands. Separate encoding 
information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170650 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:48:24 +00:00
Akira Hatanaka
0dad34a9bf [mips] Refactor shift immediate instructions. Separate encoding information 
from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170649 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:44:41 +00:00
Akira Hatanaka
ab48c503e2 [mips] Refactor arithmetic and logic instructions with immediate operands. 
Separate encoding information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170648 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:40:03 +00:00
Akira Hatanaka
23a3da0113 [mips] Refactor arithmetic and logic instructions. Separate encoding 
information from the rest.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170647 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:34:05 +00:00
Sean Silva
7d31849c44 docs: Show TOC for GettingStarted.rst. 
This is a pretty lengthy document, so put the table of contents in your
face so that it's easier to scope out the content.

This document is a mess currently and needs to be
refactored/revised/split-up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170646 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:32:39 +00:00
Akira Hatanaka
c9e30ea42c [mips] Delete ArithOverflowR and ArithOverflow and use ArithLogicR and 
ArithLogicI as the instruction base classes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170642 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:00:16 +00:00
Sean Silva
6241703ee4 docs: Clean up adornments. 
For whatever reason the usage of '^^^' and '---' adornments were
reversed compared to the "canonical" style of the LLVM docs (which is
currently "the style used in SphinxQuickstartTemplate.rst"). This change
doesn't affect the document structure at all, I'm just doing it for
trivial stylistic consistency (the document content is *much* more
important---thanks Nadav for writing this up!).

Also, trim the adornments to be the same length as the section names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170638 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 02:40:45 +00:00
Sean Silva
68d5b27b36 docs: ASCII-fy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170637 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 02:23:25 +00:00
Nadav Rotem
d3071bb042 Loop Vectorizer: Enable if-conversion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170632 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 02:00:02 +00:00
Bill Wendling
f6670729aa s/AttributesImpl/AttributeImpl/g This is going to apply to Attribute, not Attributes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170631 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 01:36:59 +00:00
Bob Wilson
99d8e76d44 Do not introduce vector operations in functions marked with noimplicitfloat. 
<rdar://problem/12879313>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170630 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 01:36:20 +00:00
Jim Grosbach
46367768f7 Clean up some DOxygen comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170629 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 01:14:48 +00:00
Jim Grosbach
39758cd55d Clean up some DOxygen comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170628 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 01:14:45 +00:00
Richard Smith
8efd0f00be Fix an uninitialized member variable, found by -fsanitize=bool. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170627 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 01:05:39 +00:00
Nadav Rotem
a6603b35a9 whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170626 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 00:49:56 +00:00
Nadav Rotem
f9962d9391 doc: resize the image. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170622 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 00:29:18 +00:00
NAKAMURA Takumi
6b207d3cfa Target/R600: Update MIB according to r170588. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170620 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 00:22:11 +00:00
Nadav Rotem
6d1fc5389f Doc: update the chart. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170618 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 00:03:36 +00:00
Bill Wendling
5f93e2bee5 Add a context so that once we uniquify strings we can access them easily. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170615 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-19 23:55:43 +00:00
Jim Grosbach
fbf3b4a076 MC: Add MCInstrDesc::mayAffectControlFlow() method. 
MC disassembler clients (LLDB) are interested in querying if an
instruction may affect control flow other than by virtue of being
an explicit branch instruction. For example, instructions which
write directly to the PC on some architectures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170610 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-19 23:38:53 +00:00
Jim Grosbach
16f3204b95 Add isSubRegisterEq() and isSuperRegisterEq(). 
isSub and isSuper return false if RegA == RegB. Add variants which also
include the identity function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170609 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-19 23:38:49 +00:00
Jim Grosbach
e188fb7dd9 Move isSubRegister() and isSuperRegister to MCRegisterInfo. 
These were defined on TargetRegisterInfo, but they don't use any information
that's not available in MCRegisterInfo, so sink them down to be available
at the MC layer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170608 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-19 23:38:46 +00:00
Jim Grosbach
dd2fa5195e Fix doc comment. '///' not '//'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170607 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-19 23:38:44 +00:00
Michael Ilseman
f846f16c92 Refactor isIntrinsic() to be quicker, and change classof() (and thus, isa<IntrinsicInst>()) to use it. This decreases the number of occurrences of the slow-path string matching performed by getIntrinsicID(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170602 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-19 23:17:20 +00:00
Bill Wendling
18e7211068 s/AttributeListImpl/AttributeSetImpl/g to match the namechange of AttributeList. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170600 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-19 22:42:22 +00:00
Jakob Stoklund Olesen
7f4bb1b9f0 Always use addOperand(MF, MO) from MachineInstrBuilder. 
The single-argument MachineInstr::addOperand(MO) will be removed soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170599 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-19 22:35:46 +00:00
Dmitri Gribenko
344df79cc0 Add a missing 'else'. Found by grep '} if' 
No testcase because it is apparently not so trivial to construct.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170595 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-19 22:13:01 +00:00
Tom Stellard
afb71e4271 R600: Add entry in CODE_OWNERS.TXT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170594 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-19 22:10:35 +00:00
Tom Stellard
45f75be564 R600: Remove unecessary VREG alignment. 
Unlike SGPRs VGPRs doesn't need to be aligned.

Patch by: Christian König

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170593 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-19 22:10:34 +00:00