RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2025-01-26 22:45:05 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
132,291 Commits 27 Branches 0 Tags
Commit Graph

3 Commits

Author SHA1 Message Date
Tom Stellard
6ab99c7ca6 AMDGPU/SI: Enable the post-ra scheduler 
Summary:
This includes a hazard recognizer implementation to replace some of
the hazard handling we had during frame index elimination.

Reviewers: arsenm

Subscribers: qcolombet, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18602

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268143 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-04-30 00:23:06 +00:00
Matt Arsenault
6c8569fba6 AMDGPU: Re-visit nodes in performAndCombine 
This fixes test regressions when i64 loads/stores are made promote.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267240 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-04-22 22:48:38 +00:00
Matt Arsenault
88c88b2b19 DAGCombiner: Reduce 64-bit BFE pattern to pattern on 32-bit component 
If the extracted bits are restricted to the upper half or lower half,
this can be truncated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267024 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-04-21 18:03:06 +00:00