Commit Graph

79343 Commits

Author SHA1 Message Date
Quentin Colombet
2f7322b348 [ShrinkWrap] Add (a simplified version) of shrink-wrapping.
This patch introduces a new pass that computes the safe point to insert the
prologue and epilogue of the function.
The interest is to find safe points that are cheaper than the entry and exits
blocks.

As an example and to avoid regressions to be introduce, this patch also
implements the required bits to enable the shrink-wrapping pass for AArch64.


** Context **

Currently we insert the prologue and epilogue of the method/function in the
entry and exits blocks. Although this is correct, we can do a better job when
those are not immediately required and insert them at less frequently executed
places.
The job of the shrink-wrapping pass is to identify such places.


** Motivating example **

Let us consider the following function that perform a call only in one branch of
a if:
define i32 @f(i32 %a, i32 %b)  {
 %tmp = alloca i32, align 4
 %tmp2 = icmp slt i32 %a, %b
 br i1 %tmp2, label %true, label %false

true:
 store i32 %a, i32* %tmp, align 4
 %tmp4 = call i32 @doSomething(i32 0, i32* %tmp)
 br label %false

false:
 %tmp.0 = phi i32 [ %tmp4, %true ], [ %a, %0 ]
 ret i32 %tmp.0
}

On AArch64 this code generates (removing the cfi directives to ease
readabilities):
_f:                                     ; @f
; BB#0:
  stp x29, x30, [sp, #-16]!
  mov  x29, sp
  sub sp, sp, #16             ; =16
  cmp  w0, w1
  b.ge  LBB0_2
; BB#1:                                 ; %true
  stur  w0, [x29, #-4]
  sub x1, x29, #4             ; =4
  mov  w0, wzr
  bl  _doSomething
LBB0_2:                                 ; %false
  mov  sp, x29
  ldp x29, x30, [sp], #16
  ret

With shrink-wrapping we could generate:
_f:                                     ; @f
; BB#0:
  cmp  w0, w1
  b.ge  LBB0_2
; BB#1:                                 ; %true
  stp x29, x30, [sp, #-16]!
  mov  x29, sp
  sub sp, sp, #16             ; =16
  stur  w0, [x29, #-4]
  sub x1, x29, #4             ; =4
  mov  w0, wzr
  bl  _doSomething
  add sp, x29, #16            ; =16
  ldp x29, x30, [sp], #16
LBB0_2:                                 ; %false
  ret

Therefore, we would pay the overhead of setting up/destroying the frame only if
we actually do the call.


** Proposed Solution **

This patch introduces a new machine pass that perform the shrink-wrapping
analysis (See the comments at the beginning of ShrinkWrap.cpp for more details).
It then stores the safe save and restore point into the MachineFrameInfo
attached to the MachineFunction.
This information is then used by the PrologEpilogInserter (PEI) to place the
related code at the right place. This pass runs right before the PEI.

Unlike the original paper of Chow from PLDI’88, this implementation of
shrink-wrapping does not use expensive data-flow analysis and does not need hack
to properly avoid frequently executed point. Instead, it relies on dominance and
loop properties.

The pass is off by default and each target can opt-in by setting the
EnableShrinkWrap boolean to true in their derived class of TargetPassConfig.
This setting can also be overwritten on the command line by using
-enable-shrink-wrap.

Before you try out the pass for your target, make sure you properly fix your
emitProlog/emitEpilog/adjustForXXX method to cope with basic blocks that are not
necessarily the entry block.


** Design Decisions **

1. ShrinkWrap is its own pass right now. It could frankly be merged into PEI but
for debugging and clarity I thought it was best to have its own file.
2. Right now, we only support one save point and one restore point. At some
point we can expand this to several save point and restore point, the impacted
component would then be:
- The pass itself: New algorithm needed.
- MachineFrameInfo: Hold a list or set of Save/Restore point instead of one
  pointer.
- PEI: Should loop over the save point and restore point.
Anyhow, at least for this first iteration, I do not believe this is interesting
to support the complex cases. We should revisit that when we motivating
examples.

Differential Revision: http://reviews.llvm.org/D9210

<rdar://problem/3201744>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236507 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-05 17:38:16 +00:00
Lang Hames
1aeb111842 [Orc] Reapply r236465 with fixes for the MSVC bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236506 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-05 17:37:18 +00:00
Kit Barton
c3c0de39db This patch adds ABI support for v1i128 data type.
It adds v1i128 to the appropriate register classes and checks parameter passing
and return values.

This is related to http://reviews.llvm.org/D9081, which will add instructions
that exploit the v1i128 datatype.

Phabricator review: http://reviews.llvm.org/D9475



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236503 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-05 16:10:44 +00:00
Igor Laevsky
a5f2faff5c Emit comment for gc.relocate showing base and derived pointers in human readable form.
Differential Revision: http://reviews.llvm.org/D9326



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236497 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-05 13:20:42 +00:00
Daniel Sanders
672996e18e [mips] Generate code for insert/extract operations when using the N64 ABI and MSA.
Summary:
When using the N64 ABI, element-indices use the i64 type instead of i32.
In many cases, we can use iPTR to account for this but additional patterns
and pseudo's are also required.

This fixes most (but not quite all) failures in the test-suite when using
N64 and MSA together.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9342


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236494 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-05 10:32:24 +00:00
Ismail Donmez
eb32d4dc7a Fix regression in parsing armv{6,7}hl- triples. These are used by SUSE
and Redhat currently.

Reviewed by Jonathan Roelofs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236492 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-05 09:29:43 +00:00
Daniel Sanders
898fd78e33 [mips][msa] Test basic operations for the N32 ABI too.
Summary:
This required adding instruction aliases for dneg.

N64 will be enabled shortly but requires additional bugfixes.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9341


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236489 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-05 08:48:35 +00:00
Kostya Serebryany
3784f79d64 [lib/Fuzzer] use handle_abort=1 by default so that when assert() fires we save the test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236476 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-05 01:42:55 +00:00
Lang Hames
b63d8107f0 [Orc] Revert r236465 - It broke the Windows bots.
Looks like the usual missing explicit move-constructor issue with MSVC. I should
have a fix shortly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236472 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 23:30:01 +00:00
Reid Kleckner
c5315e5d05 [X86] Fix assertion while DAG combining offsets and ExternalSymbols
ExternalSymbol nodes do not contain offsets, unlike GlobalValue nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236471 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 23:22:36 +00:00
Pete Cooper
8737acdac2 [ARM] IT block insertion needs to update kill flags
When forming an IT block from the first MOV here:

	%R2<def> = t2MOVr %R0, pred:1, pred:%CPSR, opt:%noreg
	%R3<def> = tMOVr %R0<kill>, pred:14, pred:%noreg

the move in to R3 is moved out of the IT block so that later instructions on the same predicate can be inside this block, and we can share the IT instruction.

However, when moving the R3 copy out of the IT block, we need to clear its kill flags for anything in use at this point in time, ie, R0 here.

This appeases the machine verifier which thought that R0 wasn't defined when used.

I have a test case, but its extremely register allocator specific.  It would be too fragile to commit a test which depends on the register allocator here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236468 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 22:44:47 +00:00
Lang Hames
ee160106a1 [Orc] Refactor the compile-on-demand layer to make module partitioning lazy,
and avoid cloning unused decls into every partition.

Module partitioning showed up as a source of significant overhead when I
profiled some trivial test cases. Avoiding the overhead of partitionging
for uncalled functions helps to mitigate this.

This change also means that it is no longer necessary to have a
LazyEmittingLayer underneath the CompileOnDemand layer, since the
CompileOnDemandLayer will not extract or emit function bodies until they are
called.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236465 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 22:03:10 +00:00
Tim Northover
7f88b179b1 CodeGen: match up correct insertvalue indices when assessing tail calls.
When deciding whether a value comes from the aggregate or inserted value of an
insertvalue instruction, we compare the indices against those of the location
we're interested in. One of the lists needs reversing because the input data is
backwards (so that modifications take place at the end of the SmallVector), but
we were reversing both before leading to incorrect results.

Should fix PR23408

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236457 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 20:41:51 +00:00
Alex Lorenz
c41c3a4c3b YAML: Add an optional 'flow' field to the mapping trait to allow flow mapping output.
This patch adds an optional 'flow' field to the MappingTrait
class so that yaml IO will be able to output flow mappings.

Reviewers: Justin Bogner

Differential Revision: http://reviews.llvm.org/D9450


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236456 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 20:11:40 +00:00
Keno Fischer
9cffebf3f8 Respect object format choice on Darwin
Summary:
The object format can be set to something other than MachO, e.g.
to use ELF-on-Darwin for MCJIT. This already works on Windows, so
there's no reason it shouldn't on Darwin.

Reviewers: lhames, grosbach

Subscribers: rafael, grosbach, t.p.northover, llvm-commits

Differential Revision: http://reviews.llvm.org/D6185

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236455 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 20:03:01 +00:00
Reid Kleckner
8c0af15338 Fix -Wmicrosoft warning by making enum unsigned
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236436 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 18:21:35 +00:00
Davide Italiano
de7e17f65a [IR/Diagnostic] Assert that DebugLoc is valid before accessing.
PR:		23380
Differential Revision:	http://reviews.llvm.org/D9464
Reviewed by:	dexonsmith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236435 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 18:08:35 +00:00
Hans Wennborg
375079a549 Option parsing: properly handle flag aliases for joined options (PR23394)
A joined option always needs to have an argument, even if it's an empty one.

Clang would previously assert when trying to use --extra-warnings, which is
a flag alias for -W, which is a joined option.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236434 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 18:00:13 +00:00
Ulrich Weigand
e6cd0c73a7 [SystemZ] Reclassify f32 subregs of f64 registers
At the moment, all subregs defined by the SystemZ target can be modified
independently of the wider register.  E.g. writing to a GR32 does not
change the upper 32 bits of the GR64.  Writing to an FP32 does not change
the lower 32 bits of the FP64.

Hoewver, the upcoming support for the vector extension redefines FP64 as
one half of a V128.  Floating-point operations leave the other half of
a V128 in an unpredictable state, so it's no longer the case that writing
to an FP32 leaves the bits of the underlying register (the V128) alone.
I'd prefer to have separate subreg_ names for this situation, so that
it's obvious at a glance whether we're talking about a subreg that leaves
the other parts of the register alone.

No behavioral change intended.

Patch originally by Richard Sandiford.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236433 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 17:41:22 +00:00
Ulrich Weigand
7f3a9e28fa [SystemZ] Clean up AsmParser isMem() handling
We know what MemoryKind an operand has at the time we construct it,
so we might as well just record it in an unused part of the structure.
This makes it easier to add scatter/gather addresses later.

No behavioral change intended.

Patch originally by Richard Sandiford.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236432 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 17:40:53 +00:00
Ulrich Weigand
d9af71b574 [SystemZ] Fix getTargetNodeName
It seems SystemZTargetLowering::getTargetNodeName got out of sync with
some recent changes to the SystemZISD opcode list.  Add back all the
missing opcodes (and re-sort to the same order as SystemISelLowering.h).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236430 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 17:39:40 +00:00
Pete Cooper
ba99a57342 ScheduleDAGInstrs should toggle kill flags on bundled instrs.
ScheduleDAGInstrs wasn't setting or clearing the kill flags on instructions inside bundles.  This led to code such as this

%R3<def> = t2ANDrr %R0
BUNDLE %ITSTATE<imp-def,dead>, %R0<imp-use,kill>
  t2IT 1, 24, %ITSTATE<imp-def>
  R6<def,tied6> = t2ORRrr %R0<kill>, ...

being transformed to

BUNDLE %ITSTATE<imp-def,dead>, %R0<imp-use>
  t2IT 1, 24, %ITSTATE<imp-def>
  R6<def,tied6> = t2ORRrr %R0<kill>, ...
%R3<def> = t2ANDrr %R0<kill>

where the kill flag was removed from the BUNDLE instruction, but not the t2ORRrr inside it.  The verifier then thought that
R0 was undefined when read by the AND.

This change make the toggleKillFlags method also check for bundles and toggle flags on bundled instructions.
Setting the kill flag is special cased as we only want to set the kill flag on the last instruction in the bundle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236428 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 16:52:06 +00:00
Tom Stellard
01007da245 R600/SI: Code cleanup
This is a follow-up to r236004

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236427 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 16:45:08 +00:00
Elena Demikhovsky
125a76c502 AVX-512: added calling convention for i1 vectors in 32-bit mode.
Fixed some bugs in extend/truncate for AVX-512 target.
Removed VBROADCASTM (masked broadcast) node, since it is not used any more.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236420 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 12:40:50 +00:00
Elena Demikhovsky
70a6f4522a AVX-512: added integer "add" and "sub" instructions with saturation for SKX
with intrinsics and tests

by Asaf Badouh (asaf.badouh@intel.com)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236418 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 12:35:55 +00:00
Elena Demikhovsky
869807297d AVX-512: Added VPACK* instructions forms for KNL and SKX
and their intrinsics
by Asaf Badouh (asaf.badouh@intel.com)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236414 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 09:14:02 +00:00
Yaron Keren
bf2b36bae1 Replace windows_error calls with mapWindowsError.
After r210687, windows_error does nothing but call mapWindowsError.
Other Windows/*.inc files directly call mapWindowsError. This patch
updates Path.inc and Process.inc to do the same.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236409 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 04:48:10 +00:00
Craig Topper
82b7c1b25b [TableGen] Replace 'static_cast' with 'cast'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236398 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 01:35:42 +00:00
Craig Topper
dc0b6f2171 [TableGen] Formatting cleanup. Mostly removing trailing whitespace and unnecessary curly braces. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236397 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-04 01:35:39 +00:00
Elena Demikhovsky
2d05c885ff Masked gather and scatter intrinsics - enabled codegen for KNL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236394 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-03 07:12:25 +00:00
Simon Pilgrim
6b7b96f74c [SSE2] Minor tidyup of v16i8 SHL lowering. NFC.
Removed code that was replicating v8i16 'shift + mask' implementation that is done more nicely by making use of LowerScalarImmediateShift


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236388 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-02 14:42:43 +00:00
Simon Pilgrim
d85813d9a5 [DAGCombiner] Enabled vector float/double -> int constant folding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236387 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-02 13:04:07 +00:00
David Blaikie
e97eefc9c6 DebugInfo: Use low_pc relative debug_ranges under fission when the CU has a low_pc
Seems we were setting the base address on the wrong DwarfCompileUnit
object so it wasn't being used when generating the ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236377 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-02 02:31:49 +00:00
Jim Grosbach
000564c01a Fix spelling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236367 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-02 00:44:07 +00:00
Reid Kleckner
039d60c254 Revert "[WinEH] Add an EH registration and state insertion pass for 32-bit x86"
This reverts commit r236359. Things are still broken despite testing. :(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236360 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 22:50:14 +00:00
Reid Kleckner
2701a7ff17 Re-land "[WinEH] Add an EH registration and state insertion pass for 32-bit x86"
This reverts commit r236340.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236359 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 22:40:25 +00:00
Quentin Colombet
32675bbfd0 [AArch64][FastISel] Variant of the logical instructions that use two input
registers cannot write on SP.

rdar://problem/20748715


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236352 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 21:34:57 +00:00
Colin LeMahieu
204bccaa24 [Hexagon] Removing variable unused in release.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236351 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 21:30:22 +00:00
Colin LeMahieu
a036240a88 [Hexagon] Adding expression MC emission and removing XFAIL from test that hits this code path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236348 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 21:14:21 +00:00
Quentin Colombet
4688a0507c [AArch64][FastISel] Fix the setting of kill flags for MUL -> UMULH sequences.
rdar://problem/20748715


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236346 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 20:57:11 +00:00
Zachary Turner
2e8b406d43 Fix build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236343 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 20:33:10 +00:00
Zachary Turner
7c69a58214 [llvm-pdbdump] Support dynamic load address and external symbols.
This patch adds the --load-address command line option to
llvm-pdbdump, which dumps all addresses assuming the module has
loaded at the specified address.

Additionally, this patch adds an option to llvm-pdbdump to support
dumping of public symbols (i.e. symbols with external linkage).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236342 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 20:24:26 +00:00
Keno Fischer
277d81e680 Reapply [RuntimeDyldELF] Fold Placeholder into Addend
This reapplies r235060 and 235070, which were reverted because of test failures
in LLDB. The failure was caused because at  moment RuntimeDyld is processing
relocations for all sections, irrespective of whether we actually load them
into memory or not, but RuntimeDyld was not actually remembering where in memory
the unrelocated section is. This commit includes a fix for that issue by
remembering that pointer, though the longer term fix should be to stop processing
unneeded sections.

Original Summary:

This allows us to get rid of the original unrelocated object file after
we're done processing relocations (but before applying them).
MachO and COFF already do not require this (currently we have temporary hacks
to prevent ownership from being released, but those are brittle and should be
removed soon).

The placeholder mechanism allowed the relocation resolver to look at original
object file to obtain more information that are required to apply the
relocations. This is usually necessary in two cases:

- For relocations targetting sub-word memory locations, there may be pieces
  of the instruction at the target address which we should not override.
- Some relocations on some platforms allow an extra addend to be encoded in
  their immediate fields.

The problem is that in the second case the information cannot be recovered
after the relocations have been applied once because they will have been
overridden. In the first case we also need to be careful to not use any bits
that aren't fixed and may have been overriden by applying a first relocation.

In the past both have been fixed by just looking at original object file. This
patch attempts to recover the information from the first by looking at the
relocated object file, while the extra addend in the second case is read
upon relocation processing and addend to the regular addend.

I have tested this on X86. Other platforms represent my best understanding
of how those relocations should work, but I may have missed something because
I do not have access to those platforms.
We will keep the ugly workarounds in place for a couple of days, so this commit
can be reverted if it breaks the bots.

Differential Revision: http://reviews.llvm.org/D9028

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236341 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 20:21:45 +00:00
Reid Kleckner
053f7d148e Revert "[WinEH] Add an EH registration and state insertion pass for 32-bit x86"
This reverts commit r236339, it breaks the win32 clang-cl self-host.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236340 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 20:14:04 +00:00
Reid Kleckner
018ed7b68b [WinEH] Add an EH registration and state insertion pass for 32-bit x86
This pass is responsible for constructing the EH registration object
that gets linked into fs:00, which is all it does in this change. In the
future, it will also insert stores to update the EH state number.

I considered keeping this functionality in WinEHPrepare, but it's pretty
separable and X86 specific. It has conceptually very little to do with
the task of WinEHPrepare, which is currently outlining.  WinEHPrepare is
also in theory useful on ARM, but this logic is pretty x86 specific.

Reviewers: andrew.w.kaylor, majnemer

Differential Revision: http://reviews.llvm.org/D9422

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236339 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 20:04:54 +00:00
Pete Cooper
930e05eaef [ARM] Transfer the internal flag in thumb2 size reduction.
Converting from t2LDRs to tLDRr caused the shift argument to drop the internal flag.  This would then throw machine verifier errors.

Unfortunately i'm having trouble reducing a test case.  I'm going to keep trying, but so far its a scary combination of machine sinking, an 'and i1', loads feeding loads, and a bunch of code which shouldn't change IT block formation, but does.  Its not useful to commit a test in that state as we have no way of knowing if it even hits this code reliably in future.

rdar://problem/20752113

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236333 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 18:57:32 +00:00
Alex Lorenz
9791e1ad9c YAML: Fix the output of sequences that contain flow sequences.
This patch fixes a bug where the YAML Output class emitted
a sequence of flow sequences without the '-' characters.
Before:
  
  seq:
    [ a, b ]
    [ c, d ]

After:

  seq:
    - [ a, b ]
    - [ c, d ]


Reviewers: Justin Bogner

Differential Revision: http://reviews.llvm.org/D9206


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236329 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 18:34:25 +00:00
Peter Collingbourne
dc1a030aec ARM: Align functions containing Thumb-2 jump tables to 4 bytes.
Functions with jump tables need an alignment of 4 because they use the ADR
instruction, which aligns the PC to 4 bytes before adding an offset.

Differential Revision: http://reviews.llvm.org/D9424

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236327 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 18:05:59 +00:00
James Y Knight
a2dd41dead [Sparc] Repair fixups in little endian mode.
Differential Revision: http://reviews.llvm.org/D9434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236324 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 17:13:02 +00:00
Douglas Katzman
300ebc5b86 Fix omission from adding sparcel (original http://reviews.llvm.org/D9263)
"obviously" it needs to go in parseArch *and* getArchTypeForLLVMName.

Differential Revision: http://reviews.llvm.org/D9436

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236322 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 16:49:58 +00:00