144551 Commits

Author SHA1 Message Date
Ahmed Bougacha
3ebe403844 [GlobalISel] Add a test for the tablegen selector emitter backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294075 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-04 00:47:05 +00:00
Ahmed Bougacha
40d6dfa91e [GlobalISel] Separate matchers with newlines in emitted selector. NFC.
We don't try very hard to format the emitted code, but newlines
are an easy way to make it more readable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294074 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-04 00:47:02 +00:00
Ahmed Bougacha
6dc8838a5b [Support] Simplify triple check in Host CPU test. NFC.
Cleanup the check added in r293990 using the Triple helpers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294073 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-04 00:46:59 +00:00
Eugene Zelenko
3a1cd31471 [Sparc] Fix some Include What You Use warnings; other minor fixes (NFC).
This is preparation to reduce MCExpr.h dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294072 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-04 00:36:49 +00:00
Brendon Cahoon
f7dc192ed6 [RegisterCoalescer] Do not call getInstructionIndex with DBG_VALUE
An assert occurs when calling SlotIndexes::getInstructionIndex with
a DBG_VALUE instruction because the function expects an instruction
with a slot index. However, there is no slot index for a DBG_VALUE
instruction.

Differential Revision: https://reviews.llvm.org/D29048



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294070 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-04 00:10:22 +00:00
Eugene Zelenko
591fad1982 [Mips] Fix some Include What You Use warnings; other minor fixes (NFC).
This is preparation to reduce MCExpr.h dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294069 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 23:39:33 +00:00
Eugene Zelenko
cdc36e9281 [SystemZ] Fix some Include What You Use warnings; other minor fixes (NFC).
This is preparation to reduce MCExpr.h dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294068 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 23:39:06 +00:00
Eugene Zelenko
bbfbbad7f5 [AMDGPU] Fix some Include What You Use warnings; other minor fixes (NFC).
This is preparation to reduce MCExpr.h dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294067 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 23:38:40 +00:00
Sanjay Patel
7c4d39c349 [InstCombine] treat i1 as a special type in shouldChangeType()
This patch is based on the llvm-dev discussion here:
http://lists.llvm.org/pipermail/llvm-dev/2017-January/109631.html

Folding to i1 should always be desirable because that's better for value tracking 
and we have special folds for i1 types.

I checked for other users of shouldChangeType() where this might have an effect, 
but we already handle the i1 case differently than other types in all of those cases.

Side note: the default datalayout includes i1, so it seems we only find this gap in 
shouldChangeType + phi folding for the case when there is (1) an explicit datalayout 
without i1, (2) casting to i1 from a legal type, and (3) a phi with exactly 2 incoming
casted operands (as Björn mentioned).

Differential Revision: https://reviews.llvm.org/D29336


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294066 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 23:13:11 +00:00
Amaury Sechet
21b9ce0d3d [APInt] Add integer API bor bitwise operations.
Summary: As per title. I ran into that limitation of the API doing some other work, so I though that'd be a nice addition.

Reviewers: jroelofs, compnerd, majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29503

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294063 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 22:54:41 +00:00
Kostya Serebryany
66d69563f7 [libFuzzer] properly hide the memcmp interceptor from msan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294061 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 22:51:38 +00:00
Xinliang David Li
748bc4973c [PGO] Add select instr profile in graph dump
Differential Revision: http://reviews.llvm.org/D29474



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294055 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 21:57:51 +00:00
Eugene Zelenko
25fbb20c14 [AArch64] Fix some Include What You Use warnings; other minor fixes (NFC).
This is preparation to reduce MCExpr.h dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294053 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 21:49:13 +00:00
Eugene Zelenko
15f1b9d2fd [ARM] Fix some Include What You Use warnings; other minor fixes (NFC).
This is preparation to reduce MCExpr.h dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294052 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 21:48:12 +00:00
Eugene Zelenko
f63ba18d30 [XCore] Fix some Include What You Use warnings; other minor fixes (NFC).
This is preparation to reduce MCExpr.h dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294051 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 21:46:55 +00:00
Sanjay Patel
756b38c9d2 [InstCombine] fix operand-complexity-based canonicalization (PR28296)
The code comments didn't match the code logic, and we didn't actually distinguish the fake unary (not/neg/fneg) 
operators from arguments. Adding another level to the weighting scheme provides more structure and can help 
simplify the pattern matching in InstCombine and other places.

I fixed regressions that would have shown up from this change in:
rL290067
rL290127

But that doesn't mean there are no pattern-matching logic holes left; some combines may just be missing regression tests.

Should fix:
https://llvm.org/bugs/show_bug.cgi?id=28296

Differential Revision: https://reviews.llvm.org/D27933


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294049 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 21:43:34 +00:00
Artem Tamazov
78b8ffc7b6 [AMDGPU][mc][tests][NFC] Add coverage/smoke Gfx7 asm test (3rd attempt)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294047 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 21:28:16 +00:00
Zachary Turner
e1a6c0f419 Properly parse the TypeServer2 record.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294046 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 21:22:27 +00:00
Sanjay Patel
482cfedce1 [InstCombine] auto-generate better test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294040 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 20:56:38 +00:00
Matt Arsenault
759feefabc AMDGPU: AsmParser cleanups
Use typedef, remove unnecessary enum, line wraps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294039 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 20:49:51 +00:00
Matt Arsenault
ee8a0f044d AMDGPU: Cleanup scalar_to_vector test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294038 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 20:49:48 +00:00
Mike Aizatsky
0022fc7373 [libfuzzer] chromium-related compilation fixes
Reviewers: kcc

Differential Revision: https://reviews.llvm.org/D29502

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294035 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 20:26:44 +00:00
Sanjay Patel
48521a9c53 [InstCombine] auto-generate better test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294034 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 20:19:33 +00:00
Stanislav Mekhanoshin
8773751a3d [AMDGPU] Bump -amdgpu-unroll-threshold-private to 2000
This has quite positive performance impact according to measurements.
Before previous fixes to limit the optimization that was too high
and blowed compile time and scratch usage, but now this is gone and
we can bump the threshold.

Differential Revision: https://reviews.llvm.org/D29505

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294032 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 20:08:29 +00:00
Matt Arsenault
6c28c24b6e AMDGPU: Set MCAsmInfo::PointerSize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294031 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 20:02:23 +00:00
Matt Arsenault
94b8d93358 AMDGPU: Don't unroll for private with dynamic allocas
This won't be elimnated, so this will just bloat code
if/when these are ever used/supported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294030 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 19:36:00 +00:00
Michael Kuperstein
55c04887b4 [SLP] Make sortMemAccesses explicitly return an error. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294029 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 19:32:50 +00:00
Ahmed Bougacha
497ef8ab01 [TLI] Robustize SDAG LibFunc proto checking by merging it into TLI.
This re-applies commit r292189, reverted in r292191.

SelectionDAGBuilder recognizes libfuncs using some homegrown
parameter type-checking.

Use TLI instead, removing another heap of redundant code.

This isn't strictly NFC, as the SDAG code was too lax.
Concretely, this means changes are required to a few tests:
- calling a non-variadic function via a variadic prototype isn't OK;
  it just happens to work on x86_64 (but not on, e.g., aarch64).
- mempcpy has a size_t parameter;  the SDAG code accepts any integer
  type, which meant using i32 on x86_64 worked.
- a handful of SystemZ tests check the SDAG support for lax prototype
  checking: Ulrich agrees on removing them.

I don't think it's worth supporting any of these (IMO) invalid
testcases.  Instead, fix them to be more meaningful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294028 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 19:11:19 +00:00
Michael Kuperstein
dce4987e9b [SLP] Use SCEV to sort memory accesses.
This generalizes memory access sorting to use differences between SCEVs,
instead of relying on constant offsets. That allows us to properly do
SLP vectorization of non-sequentially ordered loads within loops bodies.

Differential Revision: https://reviews.llvm.org/D29425


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294027 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 19:09:45 +00:00
Tim Northover
30af5932fd GlobalISel: translate dynamic alloca instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294022 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 18:22:45 +00:00
Kevin Enderby
b6a21d0438 Fix a bug in llvm-obdump(1) with the -objc-meta-data flag with -macho
which caused a hang on a malformed binary with bad bind info.

rdar://29672108


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294021 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 18:22:04 +00:00
Simon Pilgrim
da9f518360 [X86][SSE] Add support for combining scalar_to_vector(extract_vector_elt) into a target shuffle.
Correctly flagging upper elements as undef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294020 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 17:59:58 +00:00
Simon Pilgrim
ae1a5463c7 [X86][SSE] Renamed all_of/any_of reduction patterns tests
Make it clear these tests sign-extend the comparison result. Some patterns zero-extend to a bool result that we still need to handle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294018 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 17:31:01 +00:00
Anna Thomas
6b0ddaae3f NFC: [LoopUnroll] More meaningful message in tracing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294017 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 17:12:43 +00:00
Peter Collingbourne
a06bb017cf IRMover: Merge flags LinkModuleInlineAsm and IsPerformingImport.
Currently these flags are always the inverse of each other, so there is
no need to keep them separate.

Differential Revision: https://reviews.llvm.org/D29471

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294016 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 17:01:14 +00:00
Peter Collingbourne
fa65bcf4a1 ModuleLinker: Remove importing support. NFCI.
Differential Revision: https://reviews.llvm.org/D29470

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294015 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 16:58:19 +00:00
Peter Collingbourne
efcd8f2760 FunctionImport: Use IRMover directly.
The importer was previously using ModuleLinker in a sort of "IRMover mode". Use
IRMover directly instead in order to remove a level of indirection.

I will remove all importing support from ModuleLinker in a separate
change.

Differential Revision: https://reviews.llvm.org/D29468

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294014 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 16:56:27 +00:00
Peter Collingbourne
055ebfae9a Object: Handle files without a dynamic symbol table.
Differential Revision: https://reviews.llvm.org/D29482

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294013 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 16:53:55 +00:00
Simon Dardis
4692382fbf [mips] Remove absolute size assertion for end directive
The .end <symbol> directive for MIPS marks the end of a symbol and sets the
symbol's size. Previously, the corresponding emitDirective handler asserted
that a function's size could be evaluated to an absolute value at that point
in time.

This cannot be done with when directives like .align have been encountered,
instead set the function's size to the corresponding symbolic expression and
let ELFObjectWriter resolve the expression to an absolute value. This avoids
a redundant call to evaluateAsAbsolute.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294012 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 15:48:53 +00:00
Justin Lebar
77ddc3f5dd [NVPTX] Enable combineRepeatedFPDivisors for NVPTX.
Reviewers: tra

Subscribers: jholewinski, llvm-commits

Differential Revision: https://reviews.llvm.org/D29477

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294011 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 15:13:50 +00:00
Justin Lebar
af87d6f217 [ADT] Fix comment on StringRef::take_back. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294010 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 15:13:34 +00:00
Daniel Sanders
2733db6fd1 [globalisel] Fix missing break.
The instruction selector has been emitting the register bank information too.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294007 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 14:18:35 +00:00
Artem Tamazov
70e6a6c2ce [AMDGPU][mc] Fix AddressSanitizer leftover issue in gfx7_asm_all test
Issue occurs when assembling "ds_ordered_count v0, v0 gds".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294004 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 12:47:30 +00:00
Alexey Bataev
c371430a10 [SelectionDAG] Fix for PR30775: Assertion `NodeToMatch->getOpcode() !=
ISD::DELETED_NODE && "NodeToMatch was removed partway through
selection"' failed.

NodeToMatch can be modified during matching, but code does not handle
this situation.

Differential Revision: https://reviews.llvm.org/D29292

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294003 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 12:28:40 +00:00
Sanne Wouda
90365ceb11 [ARM] Change TCReturn to tBL if tailcall optimization fails.
Summary:
The tail call optimisation is performed before register allocation, so
at that point we don't know if LR is being spilt or not. If LR was spilt
to the stack, then we cannot do a tail call optimisation. That would
involve popping back into LR which is not possible in Thumb1 code.

Reviewers: rengolin, jmolloy, rovka, olista01

Reviewed By: olista01

Subscribers: llvm-commits, aemerson

Differential Revision: https://reviews.llvm.org/D29020

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294000 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 11:15:53 +00:00
Sanne Wouda
5f9d8e2229 [LLC] Add an inline assembly diagnostics handler.
Summary:
llc would hit a fatal error for errors in inline assembly. The
diagnostics message is now printed.

Reviewers: rengolin, MatzeB, javed.absar, anemet

Reviewed By: anemet

Subscribers: jyknight, nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D29408

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293999 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 11:14:39 +00:00
Sanne Wouda
e96f3c3a4c Test commit: remove a blank line.
Testing commit access.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293998 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 10:56:57 +00:00
Alexey Bataev
dfb9a4d840 [SLP] Fix for PR31690: Allow using of extra values in horizontal reductions.
Currently LLVM supports vectorization of horizontal reduction
instructions with initial value set to 0. Patch supports vectorization
of reduction with non-zero initial values. Also it supports a
vectorization of instructions with some extra arguments, like:

float f(float x[], int a, int b) {
  float p = a % b;
  p += x[0] + 3;
  for (int i = 1; i < 32; i++)
    p += x[i];
  return p;
}

Patch allows vectorization of this kind of horizontal reductions.

Differential Revision: https://reviews.llvm.org/D28961

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293994 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 08:08:50 +00:00
Mehdi Amini
38fd8b4c14 Revert "[ThinLTO] Add an auto-hide feature"
This reverts commit r293970.

After more discussion, this belongs to the linker side and
there is no added value to do it at this level.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293993 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 07:41:43 +00:00
Stanislav Mekhanoshin
95787fcd27 [AMDGPU] Unroll preferences improvements
Exit loop analysis early if suitable private access found.
Do not account for GEPs which are invariant to loop induction variable.
Do not account for Allocas which are too big to fit into register file anyway.
Add option for tuning: -amdgpu-unroll-threshold-private.

Differential Revision: https://reviews.llvm.org/D29473

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293991 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 02:20:05 +00:00