6 Commits

Author SHA1 Message Date
Simon Pilgrim
16ce778275 [X86][SSE] Add support for (V)PMOVSX* constant folding
We already have (V)PMOVZX* combining support, this is the beginning of handling (V)PMOVSX* similarly - other combines in combineVSZext can be generalized in future patches.

This unearthed an interesting bug in that we were generating illegal build vectors on 32-bit targets - it was proving difficult to create a test for it from PMOVZX, but it fired immediately with PMOVSX. I've created a more general form of the existing getConstVector to handle these cases - ideally this should be handled in non-target-specific code but I couldn't find an equivalent.

Differential Revision: https://reviews.llvm.org/D25874

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285072 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-25 14:29:25 +00:00
Simon Pilgrim
def1cb0575 [X86][AVX] Enabled SMUL_LOHI/UMUL_LOHI v8i32 vectors on AVX1 targets
Correct splitting of v8i32 vectors into v4i32 vectors to prevent scalarization

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264517 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-26 18:32:13 +00:00
Simon Pilgrim
3711520788 [X86][AVX] Enabled MULHS/MULHU v16i16 vectors on AVX1 targets
Correct splitting of v16i16 vectors into v8i16 vectors to prevent scalarization

Differential Revision: http://reviews.llvm.org/D18307

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264512 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-26 15:44:55 +00:00
Simon Pilgrim
1ecfaf6f50 [X86][SSE] Add MULHS/MULHU custom lowering for i8 vectors
Currently this is to mainly to prevent scalarization of integer division by constants.

Differential Revision: http://reviews.llvm.org/D18307

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264511 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-26 15:27:20 +00:00
Simon Pilgrim
e74069e335 [X86][AVX] Added AVX1 tests for 256-bit vector idiv-by-constant
Prep work based on feedback for D18307 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264086 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-22 20:10:49 +00:00
Simon Pilgrim
9cba37e8d4 [X86][SSE] Add vector integer division by constant tests
Expanded tests and split into sdiv/srem and udiv/urem cases for 128 and 256 bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263917 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-20 21:46:58 +00:00