30581 Commits

Author SHA1 Message Date
Tim Northover
3f631b82fa GlobalISel: add buildUndef method to MachineIRBuilder. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297044 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-06 18:36:40 +00:00
Tim Northover
2146bf29cd GlobalISel: refactor legalization of G_INSERT.
Now that G_INSERT instructions can only insert one register, this code was
overly general. In another direction it didn't handle registers that crossed
split boundaries properly, which needed to be fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297042 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-06 18:23:04 +00:00
Dehao Chen
08b8679347 Remove the sample pgo annotation heuristic that uses call count to annotate basic block count.
Summary: We do not need that special handling because the debug info is more accurate now. Performance testing shows no regression on google internal benchmarks.

Reviewers: davidxl, aprantl

Reviewed By: aprantl

Subscribers: llvm-commits, aprantl

Differential Revision: https://reviews.llvm.org/D30658

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297038 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-06 17:49:59 +00:00
Dean Michael Berris
8c95619c81 [XRay] Allow logging the first argument of a function call.
Summary:
Functions with the "xray-log-args" attribute will have a special XRay sled kind
emitted, for compiler-rt to copy any call arguments to your logging handler.

For practical and performance reasons, only the first argument is supported, and
only up to 64 bits.

Reviewers: dberris

Reviewed By: dberris

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29702

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296998 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-06 06:48:56 +00:00
Craig Topper
9eb5f1b207 [APInt] Move operator~ out of line to make it better able to reused memory allocation from temporary objects
Summary:
This makes operator~ take the APInt by value so if it came from a temporary APInt the move constructor will get invoked and it will be able to reuse the memory allocation from the temporary.

This is similar to what was already done for 2s complement negation.

Reviewers: hans, davide, RKSimon

Reviewed By: davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30614

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296997 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-06 06:30:47 +00:00
Craig Topper
8da2185645 [APInt] Remove add and sub functions from APIntOps namespace.
They aren't used in tree and using the overloaded operators has more optimization opportunities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296995 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-06 04:35:01 +00:00
Craig Topper
1ac3bab13f [APInt] Remove unused And/Or/Xor methods. They just forward to the corresponding operator overload.
I plan to enhance the operator overloads to handle rvalues and these methods would not longer be optimal to use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296993 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-06 00:24:53 +00:00
Craig Topper
e0e40c6867 [APInt] Remove the And/Or/Xor/Not functions from the APIntOps namespace.
Summary:
They aren't used anywhere in tree and its preferable to use the &, |, ^, or ~ operators.

With my patch to add rvalue reference support to &, |, ^ operators it also becomes less performant to use these functions.

Reviewers: RKSimon, davide, hans

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30613

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296990 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-05 16:41:11 +00:00
Simon Pilgrim
ca6750e3d5 [X86][SSE] Lower 128-bit vectors to SIGN/ZERO_EXTEND_VECTOR_IN_REG ops
As described on PR31712, we miss a variety of legalization combines because we lower these to X86ISD::VSEXT/VZEXT despite them having the same functionality. This patch makes 128-bit (SSE41) SIGN/ZERO_EXTEND_VECTOR_IN_REG ops legal, adds the necessary tablegen plumbing and uses a helper 'getExtendInVec' to decide when to use SIGN/ZERO_EXTEND_VECTOR_IN_REG or VSEXT/VZEXT.

We're missing a couple of shuffle combines that will be added in a future patch for review.

Later patches can then support the AVX2 cases as a mixture of SIGN/ZERO_EXTEND and SIGN/ZERO_EXTEND_VECTOR_IN_REG, and then finally deal with the AVX512 cases.

Differential Revision: https://reviews.llvm.org/D30549

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296985 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-05 09:57:20 +00:00
Sanjay Patel
59071e49a9 [DAGCombiner] allow transforming (select Cond, C +/- 1, C) to (add(ext Cond), C)
select Cond, C +/- 1, C --> add(ext Cond), C -- with a target hook.

This is part of the ongoing process to obsolete D24480.  The motivation is to 
canonicalize to select IR in InstCombine whenever possible, so we need to have a way to
undo that easily in codegen.
 
PowerPC is an obvious winner for this kind of transform because it has fast and complete 
bit-twiddling abilities but generally lousy conditional execution perf (although this might
have changed in recent implementations).

x86 also sees some wins, but the effect is limited because these transforms already mostly
exist in its target-specific combineSelectOfTwoConstants(). The fact that we see any x86 
changes just shows that that code is a mess of special-case holes. We may be able to remove 
some of that logic now.

My guess is that other targets will want to enable this hook for most cases. The likely 
follow-ups would be to add value type and/or the constants themselves as parameters for the
hook. As the tests in select_const.ll show, we can transform any select-of-constants to 
math/logic, but the general transform for any 2 constants needs one more instruction 
(multiply or 'and').

ARM is one target that I think may not want this for most cases. I see infinite loops there
because it wants to use selects to enable conditionally executed instructions.

Differential Revision: https://reviews.llvm.org/D30537


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296977 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-04 19:18:09 +00:00
Zachary Turner
6a33d44017 Try to fix thread name truncation on non-Windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296976 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-04 18:53:09 +00:00
Zachary Turner
7d7a5d9b46 Truncate thread names if they're too long.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296972 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-04 16:42:25 +00:00
Peter Collingbourne
d31e3edb6f WholeProgramDevirt: Add any unsuccessful llvm.type.checked.load devirtualizations to the list of llvm.type.test users.
Any unsuccessful llvm.type.checked.load devirtualizations will be translated
into uses of llvm.type.test, so we need to add the resulting llvm.type.test
intrinsics to the function summaries so that the LowerTypeTests pass will
export them.

Differential Revision: https://reviews.llvm.org/D29808

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296939 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-04 01:23:30 +00:00
Hans Wennborg
744959b431 Revert r296865 "[ARM] fpscr read/write intrinsics not aware of each other"
It caused PR32134: "Cannot select: intrinsic %llvm.arm.get.fpscr".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296926 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 23:19:31 +00:00
Tim Northover
ce6504cc93 GlobalISel: constrain G_INSERT to inserting just one value per instruction.
It's much easier to reason about single-value inserts and no-one was actually
using the variadic variants before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296923 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 23:05:47 +00:00
Tim Northover
f4d294cc96 GlobalISel: add merge/unmerge nodes for legalization.
These are simplified variants of the current G_SEQUENCE and G_EXTRACT, which
assume the individual parts will be contiguous, homogeneous, and occupy the
entirity of the larger register. This makes reasoning about them much easer
since you only have to look at the first register being merged and the result
to know what the instruction is doing.

I intend to gradually replace all uses of the more complicated sequence/extract
with these (or single-element insert/extracts), and then remove the older
variants. For now we start with legalization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296921 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 22:46:09 +00:00
Rong Xu
5497dd541a [PGO] Text format profile reader needs to clear the value profile
Summary:
Reset the ValueData for each function to avoid using the ones in
the previous function.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: llvm-commits, xur

Differential Revision: https://reviews.llvm.org/D30479

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296916 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 21:56:34 +00:00
Peter Collingbourne
6387bdabf7 MC: De-duplicate the object streamer implementations of EmitFileDirective into MCObjectStreamer. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296912 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 21:22:06 +00:00
Chris Bieneman
ad76c97fd9 [ObjectYAML] [DWARF] Abstract DWARF Initial Length values
In the DWARF 4 Spec section 7.2.2, data in many DWARF sections, and some DWARF structures start with "Initial Length Values", which are a 32-bit length, and an optional 64-bit length if the 32 bit value == UINT32_MAX.

This patch abstracts the Initial Length type in YAML, and extends its use to all the DWARF structures that are supported in the DWARFYAML code that have Initial Length values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296911 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 21:11:55 +00:00
Zachary Turner
e05f54b4e7 [Windows] Remove the #include <eh.h> hack.
Prior to MSVC 2015 we had to manually include this header any
time we were going to include <thread> or <future> due to a
bug in MSVC's STL implementation.  This has been fixed in MSVC
for some time now, and we require VS 2015 minimum, so we can
remove this across all subprojects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296906 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 20:21:59 +00:00
Matthias Braun
b6ebe7d6c7 RegisterCoalescer: Simplify subrange splitting code; NFC
- Use slightly better variable names / compute in a more direct way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296905 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 19:05:34 +00:00
Krzysztof Parzyszek
88a7ff46b1 Make TargetInstrInfo::isPredicable take a const reference, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296901 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 18:30:54 +00:00
Sanjoy Das
c4c0c1a3ed [LoopUnrolling] Re-prioritize Peeling and Partial unrolling
Summary:
In current implementation the loop peeling happens after trip-count based partial unrolling and may
sometimes not happen at all due to it (for example, if trip count is known, but UP.Partial = false). This
is generally bad, the more than there are some situations where peeling is profitable even if the partial
unrolling is disabled.

This patch is a NFC which reorders peeling and partial unrolling application and prepares the code for
implementation of the said optimizations.

Patch by Max Kazantsev!

Reviewers: sanjoy, anna, reames, apilipenko, igor-laevsky, mkuper

Reviewed By: mkuper

Subscribers: mkuper, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D30243

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296897 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 18:19:10 +00:00
Zachary Turner
50d14e63e0 [Support] Provide access to current thread name/thread id.
Applications often need the current thread id when making
system calls, and some operating systems provide the notion
of a thread name, which can be useful in enabling better
diagnostics when debugging or logging.

This patch adds an accessor for the thread id, and "best effort"
getters and setters for the thread name.  Since this is
non critical functionality, no error is returned to indicate
that a platform doesn't support thread names.

Differential Revision: https://reviews.llvm.org/D30526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296887 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 17:15:17 +00:00
Ranjeet Singh
82eec824a7 [ARM] fpscr read/write intrinsics not aware of each other
The intrinsics __builtin_arm_get_fpscr and __builtin_arm_set_fpscr read and
write to the fpscr (Floating-Point Status and Control Register) register.

A bug exists in the __builtin_arm_get_fpscr intrinsic definition in llvm which
treats this intrinsic as a IntroNoMem which means it's not a memory access and
doesn't have any other side-effects. Having this property on this intrinsic
means that various optimizations can be done on this such as common
sub-expression elimination with other reads. This can cause issues if there has
been write to this register, e.g.

void foo(int *p) {
     p[0] = __builtin_arm_get_fpscr();
     __builtin_arm_set_fpscr(1);
     p[1] = __builtin_arm_get_fpscr();
}

in the above example the second read is currently CSE'd into the first read,
this is because llvm isn't aware that the write done by __builtin_arm_set_fpscr
effects the same register that __builtin_arm_get_fpscr reads from, to fix this
problem I've removed the property IntrNoMem so that __builtin_arm_get_fpscr is
treated as a memory access.

Differential Revision: https://reviews.llvm.org/D30542



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296865 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 11:40:07 +00:00
Mohammad Shahid
48b84df15d [SLP] Fixes the bug due to absence of in order uses of scalars which needs to be available
for VectorizeTree() API.This API uses it for proper mask computation to be used in shufflevector IR.
The fix is to compute the mask for out of order memory accesses while building the vectorizable tree
instead of actual vectorization of vectorizable tree.It also needs to recompute the proper Lane for
external use of vectorizable scalars based on shuffle mask.

Reviewers: mkuper

Differential Revision: https://reviews.llvm.org/D30159

Change-Id: Ide8773ce0ad3562f3cf4d1a0ad0f487e2f60ce5d

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296863 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 10:02:47 +00:00
Chandler Carruth
f970832c3b [SDAG] Revert r296476 (and r296486, r296668, r296690).
This patch causes compile times for some patterns to explode. I have
a (large, unreduced) test case that slows down by more than 20x and
several test cases slow down by 2x. I'm sending some of the test cases
directly to Nirav and following up with more details in the review log,
but this should unblock anyone else hitting this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296862 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 10:02:25 +00:00
Sylvestre Ledru
f1fd1f437d Fix a typo in the comments. Patch by marktwtn from https://github.com/llvm-mirror/llvm/pull/16/files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296860 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 09:36:04 +00:00
Eugene Zelenko
f4f67a0c55 [ProfileData] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296846 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 01:07:34 +00:00
Daniel Berlin
03c7f20105 Move defClobbersUseOrDef to being a protected member of a class since we don't want anyone else using it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296838 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-02 23:06:46 +00:00
Tobias Grosser
da5173f8bf Revert "Fix PR 24415 (at least), by making our post-dominator tree behavior sane."
and also "clang-format GenericDomTreeConstruction.h, since the current
formatting makes it look like their is a bug in the loop indentation, and there
is not"

This reverts commit r296535.

There are still some open design questions which I would like to discuss. I
revert this for Daniel (who gave the OK), as he is on vacation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296812 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-02 21:08:37 +00:00
Zachary Turner
f3491b21c5 [Support] Move Stream library from MSF -> Support.
After several smaller patches to get most of the core improvements
finished up, this patch is a straight move and header fixup of
the source.

Differential Revision: https://reviews.llvm.org/D30266

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296810 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-02 20:52:51 +00:00
Vassil Vassilev
409bc1cbe6 Remove redundant include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296775 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-02 18:04:44 +00:00
Vassil Vassilev
3983dc252d Reland r296442 with modifications reverted in r296463.
Original commit message:

"Allow externally dlopen-ed libraries to be registered as permanent libraries.

This is also useful in cases when llvm is in a shared library. First we dlopen
the llvm shared library and then we register it as a permanent library in order
to keep the JIT and other services working.

Patch reviewed by Vedant Kumar (D29955)!"




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296774 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-02 17:56:45 +00:00
Serge Pavlov
e9106e2cd2 Do not verify MachimeDominatorTree if it is not calculated
If dominator tree is not calculated or is invalidated, set corresponding
pointer in the pass state to nullptr. Such pointer value will indicate
that operations with dominator tree are not allowed. In particular, it
allows to skip verification for such pass state. The dominator tree is
not calculated if the machine dominator pass was skipped, it occures in
the case of entities with linkage available_externally.

The change fixes some test fails observed when expensive checks
are enabled.

Differential Revision: https://reviews.llvm.org/D29280


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296742 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-02 12:00:10 +00:00
Peter Collingbourne
cc5ba4427e LTO: When creating a local cache, create the cache directory if it does not already exist.
Differential Revision: https://reviews.llvm.org/D30519

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296726 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-02 02:02:38 +00:00
Matthias Braun
0e90d42fce LiveRegMatrix: Fix some subreg interference checks
Surprisingly, one of the three interference checks in LiveRegMatrix was
using the main live range instead of the apropriate subregister range
resulting in unnecessarily conservative results.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296722 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-02 00:35:08 +00:00
Matthias Braun
1174171d1f LiveIntervalUnion: Remove unused function; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296721 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-02 00:15:06 +00:00
Eugene Zelenko
f3b992a333 [Support] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296714 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 23:59:26 +00:00
Ahmed Bougacha
b424c9db34 [GlobalISel] Add a way for targets to enable GISel.
Until now, we've had to use -global-isel to enable GISel.  But using
that on other targets that don't support it will result in an abort, as we
can't build a full pipeline.
Additionally, we want to experiment with enabling GISel by default for
some targets: we can't just enable GISel by default, even among those
target that do have some support, because the level of support varies.

This first step adds an override for the target to explicitly define its
level of support.  For AArch64, do that using
a new command-line option (I know..):
  -aarch64-enable-global-isel-at-O=<N>
Where N is the opt-level below which GISel should be used.

Default that to -1, so that we still don't enable GISel anywhere.
We're not there yet!

While there, remove a couple LLVM_UNLIKELYs.  Building the pipeline is
such a cold path that in practice that shouldn't matter at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296710 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 23:33:08 +00:00
Eugene Zelenko
deebf969c5 [MC] Fix MachineLocation constructor broken in r294685 (NFC).
Problem spotted by Frej Drejhammar.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296697 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 22:28:23 +00:00
Matthias Braun
a9e2ca030f LIU:::Query: Query LiveRange instead of LiveInterval; NFC
- We only need the information from the base class, not the additional
  details in the LiveInterval class.
- Spread more `const`
- Some code cleanup

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296684 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 21:48:12 +00:00
Reid Kleckner
4c3428b604 Elide argument copies during instruction selection
Summary:
Avoids tons of prologue boilerplate when arguments are passed in memory
and left in memory. This can happen in a debug build or in a release
build when an argument alloca is escaped.  This will dramatically affect
the code size of x86 debug builds, because X86 fast isel doesn't handle
arguments passed in memory at all. It only handles the x86_64 case of up
to 6 basic register parameters.

This is implemented by analyzing the entry block before ISel to identify
copy elision candidates. A copy elision candidate is an argument that is
used to fully initialize an alloca before any other possibly escaping
uses of that alloca. If an argument is a copy elision candidate, we set
a flag on the InputArg. If the the target generates loads from a fixed
stack object that matches the size and alignment requirements of the
alloca, the SelectionDAG builder will delete the stack object created
for the alloca and replace it with the fixed stack object. The load is
left behind to satisfy any remaining uses of the argument value. The
store is now dead and is therefore elided. The fixed stack object is
also marked as mutable, as it may now be modified by the user, and it
would be invalid to rematerialize the initial load from it.

Supersedes D28388

Fixes PR26328

Reviewers: chandlerc, MatzeB, qcolombet, inglorion, hans

Subscribers: igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D29668

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296683 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 21:42:00 +00:00
Craig Topper
c662d06e26 [APInt] Optimize APInt creation from uint64_t
Summary:
This patch moves the clearUnusedBits calls into the two different initialization paths for APInt from a uint64_t. This allows the compiler to better optimize the clearing of the unused bits for the single word case. And it puts the clearing for the multi word case into the initSlowCase function to save code. In the common case of initializing with 0 this allows the clearing to be completely optimized out for the single word case.

On my local x86 build this is showing a ~45kb reduction in the size of the opt binary.

Reviewers: RKSimon, hans, majnemer, davide, MatzeB

Reviewed By: hans

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30486

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296677 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 21:06:18 +00:00
Matthias Braun
14feb94314 LIU::Query: Remove unused getter; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296676 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 21:02:56 +00:00
Matthias Braun
a64f8b6c8a LIU::Query: Remove always false member+getter; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296675 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 21:02:52 +00:00
Matthias Braun
502404cf08 LiveIntervalUnion: Remove unused functions; NFC
Remove two unused functions that are in fact bad API and should not be
called anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296674 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 21:02:47 +00:00
Nemanja Ivanovic
e2f9d30428 Improve scheduling with branch coalescing
This patch adds a MachineSSA pass that coalesces blocks that branch
on the same condition.

Committing on behalf of Lei Huang.

Differential Revision: https://reviews.llvm.org/D28249


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296670 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 20:29:34 +00:00
Zachary Turner
ed2fd5866d [PDB] Fix and re-enable BinaryStreamArray test.
This was due to the test stream choosing an arbitrary partition
index for introducing the discontinuity rather than choosing
an index that would be correctly aligned for the type of data.

Also added an assertion into FixedStreamArray so that this will
be caught on all bots in the future, and not just the UBSan bot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296661 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 19:29:11 +00:00
Paul Robinson
ae89bb139d Reorder fields for better packing. (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296660 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 19:26:41 +00:00