Commit Graph

148174 Commits

Author SHA1 Message Date
Craig Topper
e8b9699699 [APSInt] Make use of APInt's recently acquired in place lshr and shl capabilities in APSInt's >>= and <<= operators.
APInt hasn't acquired an in place ashr yet, but hopefully soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301052 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 22:30:06 +00:00
Adrian Prantl
080b5ab6da Add test coverage for mem2reg dbg.declare lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301050 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 22:13:55 +00:00
Eugene Zelenko
903f87efcc [Object] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301049 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 22:03:05 +00:00
Hans Wennborg
960a40ec57 Re-commit r301040 "X86: Don't emit zero-byte functions on Windows"
In addition to the original commit, tighten the condition for when to
pad empty functions to COFF Windows.  This avoids running into problems
when targeting e.g. Win32 AMDGPU, which caused test failures when this
was committed initially.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301047 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 21:48:41 +00:00
Frederich Munch
94f347bd33 [Test commit] Remove extra newline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301046 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 21:39:50 +00:00
Matt Arsenault
cfadbaaf1a InferAddressSpaces: Infer for just GEPs
Fixes leaving intermediate flat addressing computations
where a GEP instruction's source is a constant expression.

Still leaves behind a trivial addrspacecast + gep pair that
instcombine is able to handle, which ideally could be folded
here directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301044 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 21:35:04 +00:00
Xinliang David Li
29f3141f90 [PartialInliner] Partial inliner needs to check use kind before transformation
Differential Revision: https://reviews.llvm.org/D32373



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301042 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 21:20:56 +00:00
Hans Wennborg
0720f631bf Revert r301040 "X86: Don't emit zero-byte functions on Windows"
This broke almost all bots. Reverting while fixing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301041 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 21:10:37 +00:00
Hans Wennborg
fe76aaa6ee X86: Don't emit zero-byte functions on Windows
Empty functions can lead to duplicate entries in the Guard CF Function
Table of a binary due to multiple functions sharing the same RVA,
causing the kernel to refuse to load that binary.

We had a terrific bug due to this in Chromium.

It turns out we were already doing this for Mach-O in certain
situations. This patch expands the code for that in
AsmPrinter::EmitFunctionBody() and renames
TargetInstrInfo::getNoopForMachoTarget() to simply getNoop() since it
seems it was used for not just Mach-O anyway.

Differential Revision: https://reviews.llvm.org/D32330

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301040 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 20:58:12 +00:00
Zachary Turner
9044c52d56 Add a dependency from llvm/test to llvm-cvtres.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301038 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 20:45:11 +00:00
Tim Northover
5623f8d30a AArch64: add test for "fence singlethread"
Forgot a git add yesterday.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301037 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 20:36:08 +00:00
Tim Northover
602538f2e2 ARM: make sure we use all entries in a vector before forming a vpaddl.
Otherwise there's some mismatch, and we'll either form an illegal type or an
illegal node.

Thanks to Eli Friedman for pointing out the problem with my original solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301036 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 20:35:52 +00:00
Sanjay Patel
b51ea00f00 [InstCombine] revert r300977 and r301021
This can cause an inf-loop. Investigating...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301035 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 20:29:17 +00:00
Zachary Turner
9dfab9e768 Fixed a type conversion error in BitVector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301033 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 20:18:43 +00:00
Zachary Turner
82ba8f89e0 [BitVector] Make BitVector store an ArrayRef.
This makes certain operations on the underlying storage
easier since we have access to ArrayRef methods such as
drop_front, drop_back, slice, range-based for loops, etc.

Differential Revision: https://reviews.llvm.org/D32367

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301031 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 20:12:08 +00:00
Adrian Prantl
cb0aed9eec typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301030 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 20:06:41 +00:00
Konstantin Zhuravlyov
79953642da AMDGPU/GFX9: Enable FastFMAF32
Differential Revision: https://reviews.llvm.org/D32363


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301029 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 19:57:53 +00:00
Konstantin Zhuravlyov
8c373cc5e6 AMDGPU: Temporarily disable packed inlinable literals (v2f16, v2i16)
Differential Revision: https://reviews.llvm.org/D32361


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301028 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 19:45:22 +00:00
Konstantin Zhuravlyov
ac73bb1e6a AMDGPU: Fix S_PACK_HH_B32_B16
- We really ought to zero out lower 16 bits

Differential Revision: https://reviews.llvm.org/D32356


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301026 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 19:35:05 +00:00
Yaxun Liu
5255fef87c [AMDGPU] Handle SI_MASKED_UNREACHABLE in instruction emitter
SI_MASKED_UNREACHABLE does not have machine instruction encoding.
It needs special handling in AMDGPUAsmPrinter::EmitInstruction like some
other pseudo instructions.

This patch fixes compilation failure of RadeonRays.

Differential Revision: https://reviews.llvm.org/D32364


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301025 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 19:32:02 +00:00
Matthias Braun
992d0ddce8 Revert "X86RegisterInfo: eliminateFrameIndex: Avoid code duplication; NFC"
It seems we have on situation in a sanitizer enable bootstrap build
where the return instruction has a frame index operand that does not
point to a fixed object and fails the assert added here.

This reverts commit r300923.
This reverts commit r300922.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301024 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 19:26:45 +00:00
Konstantin Zhuravlyov
989643fa78 AMDGPU: Do not lower fast unsafe div for safe, f32, with fp32 denormals
Differential Revision: https://reviews.llvm.org/D32085


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301023 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 19:25:33 +00:00
Sanjay Patel
39af0db425 [InstCombine] use isSubsetOf() for efficiency
C | ~D == -1
~(C | ~D) == 0
~C & D == 0
D & ~C == 0
D.isSubsetOf(C)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301021 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 19:16:52 +00:00
Akira Hatanaka
586c752a82 [AArch64] Improve code generation for logical instructions taking
immediate operands.

This commit adds an AArch64 dag-combine that optimizes code generation
for logical instructions taking immediate operands. The optimization
uses demanded bits to change a logical instruction's immediate operand
so that the immediate can be folded into the immediate field of the
instruction.

This recommits r300932 and r300930, which was causing dag-combine to
loop forever. The problem was that optimizeLogicalImm was returning
true even when there was no change to the immediate node (which happened
when the immediate was all zeros or ones), which caused dag-combine to
push and pop the same node to the work list over and over again without
making any progress.

This commit fixes the bug by returning false early in optimizeLogicalImm
if the immediate is all zeros or ones. Also, it changes the code to
compare the immediate with 0 or Mask rather than calling
countPopulation.

rdar://problem/18231627

Differential Revision: https://reviews.llvm.org/D5591

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301019 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 18:53:12 +00:00
Artur Pilipenko
bbc50e81b0 [InstCombine] fadd double (sitofp x), y check that the promotion is valid
Doing these transformations check that the result of integer addition is representable in the FP type.

(fadd double (sitofp x), fpcst) --> (sitofp (add int x, intcst))
(fadd double (sitofp x), (sitofp y)) --> (sitofp (add int x, y))

This is a fix for https://bugs.llvm.org//show_bug.cgi?id=27036

Reviewed By: andrew.w.kaylor, scanon, spatel

Differential Revision: https://reviews.llvm.org/D31182

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301018 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 18:45:25 +00:00
Kuba Mracek
768a04e3df Fixup for r301007: Restrict the -D hack to Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301017 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 18:19:56 +00:00
Zachary Turner
0c01e44a15 [BitVector] Add find_last() and find_last_unset().
Differential Revision: https://reviews.llvm.org/D32302

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301014 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 18:07:46 +00:00
Kuba Mracek
05c05ab154 Revert r301010: Bot failures on Windows, NetBSD and even some old Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301012 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 18:02:22 +00:00
Kuba Mracek
886373139e [libFuzzer] Always build libFuzzer
There are two reasons why users might want to build libfuzzer:
- To fuzz LLVM itself
- To get the libFuzzer.a archive file, so that they can attach it to their code
This change always builds libfuzzer, and supports the second use case if the specified flag is set.

The point of this patch is to have something that can potentially be shipped with the compiler, and this also ensures that the version of libFuzzer is correct to use with that compiler.

Patch by George Karpenkov.

Differential Revision: https://reviews.llvm.org/D32096



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301010 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 17:47:44 +00:00
Kuba Mracek
68f048198a [libFuzzer] Changing thread_local to __thread in libFuzzer
Old Apple compilers do not support thread_local keyword. This patch adds -Dthread_local=__thread when the compiler doesn't support thread_local.

Differential Revision: https://reviews.llvm.org/D32312



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301007 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 17:39:50 +00:00
Zachary Turner
35e1962de3 Add llvm-cvtres to LLVMBuild.txt
It wasn't getting picked up as an implicit project, so it wasn't
being built.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301006 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 17:37:31 +00:00
Joel Jones
afde310afd [AArch64] Refactor instruction selection lowering for addresses. NFCI
Factor out the common code used for generating addresses into common
templated functions that call overloaded versions of a new function,
getTargetNode.

Tested with make check-llvm with targets AArch64.

Differential Revision: https://reviews.llvm.org/D32169


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301005 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 17:31:03 +00:00
Zachary Turner
83e112a116 Add empty shell of llvm-cvtres.
This marks the beginning of an effort to port remaining
MSVC toolchain miscellaneous utilities to all platforms.

Currently clang-cl shells out to certain additional tools
such as the IDL compiler, resource compiler, and a few
other tools, but as these tools are Windows-only it
limits the ability of clang to target Windows on other
platforms.  having a full suite of these tools directly
in LLVM should eliminate this constraint.

The current implementation provides no actual functionality,
it is just an empty skeleton executable for the purposes
of making incremental changes.

Differential Revision: https://reviews.llvm.org/D32095
Patch by Eric Beckmann (ecbeckmann@google.com)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301004 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 17:30:29 +00:00
Tim Northover
53afc11362 ARM: don't try to create an i8 -> i32 vpaddl.
DAG combine was mistakenly assuming that the step-up it was looking at was
always a doubling, but it can sometimes be a larger extension in which case
we'd crash.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301002 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 17:21:59 +00:00
Kuba Mracek
50c9a25c60 [libFuzzer] Check for target(popcnt) capability before usage
Older compilers (e.g. LLVM 3.4) do not support the attribute target("popcnt").
In order to support those, this diff check the attribute support using the preprocessor.

Patch by George Karpenkov.

Differential Revision: https://reviews.llvm.org/D32311



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300999 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 16:57:37 +00:00
Craig Topper
2602091f82 [ValueTracking] Use APInt::setAllBits and APInt::intersects to simplify some code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300997 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 16:43:32 +00:00
Craig Topper
fe916169d7 [APInt] Add compare/compareSigned methods that return -1, 0, 1. Reimplement slt/ult and friends using them
Currently sle and ule have to call slt/ult and eq to get the proper answer. This results in extra code for both calls and additional scans of multiword APInts.

This patch replaces slt/ult with a compareSigned/compare that can return -1, 0, or 1 so we can cover all the comparison functions with a single call.

While I was there I removed the activeBits calls and other checks at the start of the slow part of ult. Both of the activeBits calls potentially scan through each of the APInts separately. I can't imagine that's any better than just scanning them in parallel and doing the compares. Now we just share the code with tcCompare.

These changes seem to be good for about a 7-8k reduction on the size of the opt binary on my local x86-64 build.

Differential Revision: https://reviews.llvm.org/D32339

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300995 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 16:13:15 +00:00
Juergen Ributzka
4059808ff6 Remove empty and unused header file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300994 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 16:05:01 +00:00
Daniel Sanders
e8660ea63d [globalisel][tablegen] Import SelectionDAG's rule predicates and support the equivalent in GIRule.
Summary:
The SelectionDAG importer now imports rules with Predicate's attached via
Requires, PredicateControl, etc. These predicates are implemented as
bitset's to allow multiple predicates to be tested together. However,
unlike the MC layer subtarget features, each target only pays for it's own
predicates (e.g. AArch64 doesn't have 192 feature bits just because X86
needs a lot).

Both AArch64 and X86 derive at least one predicate from the MachineFunction
or Function so they must re-initialize AvailableFeatures before each
function. They also declare locals in <Target>InstructionSelector so that
computeAvailableFeatures() can use the code from SelectionDAG without
modification.

Reviewers: rovka, qcolombet, aditya_nandakumar, t.p.northover, ab

Reviewed By: rovka

Subscribers: aemerson, rengolin, dberris, kristof.beyls, llvm-commits, igorb

Differential Revision: https://reviews.llvm.org/D31418

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300993 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 15:59:56 +00:00
Craig Topper
4f4553914f [SimplifyCFG] Fix the determination of PostBB in conditional store merging to handle the targets on the second branch being commuted
Currently we choose PostBB as the single successor of QFB, but its possible that QTB's single successor is QFB which would make QFB the correct choice.

Differential Revision: https://reviews.llvm.org/D32323

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300992 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 15:53:42 +00:00
Wei Mi
a88bbf0e22 [ConstHoisting] Add BFI in constanthoisting pass and select the best insertion
places based on it.

Existing constant hoisting pass will merge a group of contants in a small range
and hoist the const materialization code to the common dominator of their uses.
However, if the uses are all in cold pathes, existing implementation may hoist
the materialization code from cold pathes to a hot place. This may hurt performance.
The patch introduces BFI to the pass and selects the best insertion places based
on it.

The change is controlled by an option consthoist-with-block-frequency which is
off by default for now.

Differential Revision: https://reviews.llvm.org/D28962


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300989 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 15:50:16 +00:00
Chad Rosier
4961912e73 [AArch64][Falkor] Refine modeling of store-release exclusive instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300987 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 14:58:32 +00:00
Joel Jones
bd2e6e0b1a [Mips] Document Mips Backend Relocation Principles
This revision documents the combination of C++ and table-gen code that
handles relocations and addresses.

Thanks for Simon Dardis for the careful reviews.

Differential Revision: https://reviews.llvm.org/D31628


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300986 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 14:49:27 +00:00
Chad Rosier
3ad4f88821 [AArch64][Falkor] Refine resource needs of STRQ with register offset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300984 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 14:33:13 +00:00
Matthew Simpson
915a4bc0f9 [LV] Model if-converted phi node costs
Phi nodes in non-header blocks are converted to select instructions after
if-conversion. This patch updates the cost model to account for the selects.

Differential Revision: https://reviews.llvm.org/D31906

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300980 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 14:14:54 +00:00
Daniel Sanders
9eb6db17b6 Revert r300964 + r300970 - [globalisel][tablegen] Import SelectionDAG's rule predicates and support the equivalent in GIRule.
It's causing llvm-clang-x86_64-expensive-checks-win to fail to compile and I
haven't worked out why. Reverting to make it green while I figure it out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300978 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 14:09:20 +00:00
Sanjay Patel
bd1b03d467 [InstCombine] prefer xor with -1 because 'not' is easier to understand (PR32706)
This matches the demanded bits behavior in the DAG and should fix:
https://bugs.llvm.org/show_bug.cgi?id=32706

Differential Revision: https://reviews.llvm.org/D32255


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300977 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 14:03:54 +00:00
Chad Rosier
f9f7441f9c [AArch64][Falkor] Refine loads/stores that require an extra LD pipe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300976 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 13:55:41 +00:00
Chad Rosier
01a74846f0 [AArch64][Falkor] Fix number of microops for WriteSTIdx missed in r300892.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300975 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 13:37:01 +00:00
Chad Rosier
da9c35ab22 [AArch64] Fix a few missed pre/post-inc in Falkor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300974 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 13:36:57 +00:00