177 Commits

Author SHA1 Message Date
Craig Topper
47cf6aadec [AVX-512] Remove 128/256-bit masked fp max/min intrinsics. Upgrade them to legacy unmasked intrinsics and select instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295543 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 07:07:50 +00:00
Craig Topper
ff64e4651d [IR][X86] Simplify some AutoUpgrade code slightly. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295426 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 07:07:24 +00:00
Craig Topper
33dd89087d [IR][X86] Rename an AutoUpgrade helper function to more accurately match what intrinsics it handles. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295425 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 07:07:21 +00:00
Craig Topper
aace5e8709 [IR][X86] Move X86 specific portions of UpgradeIntrinsicFunction1 to a couple helper functions. NFC
This enables some early outs to avoid repeatedly using IsX86 check to qualify. I hope to continue to improve this to shorten the lengths of some of the string comparisons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295424 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 07:07:19 +00:00
Craig Topper
fdf5214704 [AVX-512] Remove masked packss/packus intrinsics and autoupgrade to unmasked intrinsics with select instructions. For 512-bit add new unmasked intrinsics.
The new 512-bit unmasked intrinsics will make it easy to handle these with the SSE/AVX intrinsics in InstCombine where we currently have a TODO.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295290 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-16 06:31:54 +00:00
Daniel Berlin
d17bca97a5 Implement intrinsic mangling for literal struct types.
Fixes PR 31921

Summary:
Predicateinfo requires an ugly workaround to try to avoid literal
struct types due to the intrinsic mangling not being implemented.
This workaround actually does not work in all cases (you can hit the
assert by bootstrapping with -print-predicateinfo), and can't be made
to work without DFS'ing the type (IE copying getMangledStr and using a
version that detects if it would crash).

Rather than do that, i just implemented the mangling.  It seems
simple, since they are unified structurally.

Looking at the overloaded-mangling testcase we have, it actually turns
out the gc intrinsics will *also* crash if you try to use a literal
struct.  Thus, the testcase added fails before this patch, and works
after, without needing to resort to predicateinfo.

Reviewers: chandlerc, davide

Subscribers: llvm-commits, sanjoy

Differential Revision: https://reviews.llvm.org/D29925

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295253 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-15 23:16:20 +00:00
Justin Lebar
e5aefeb9b8 [NVPTX] Auto-upgrade some NVPTX intrinsics to LLVM target-generic code.
Summary:
Specifically, we upgrade llvm.nvvm.:

 * brev{32,64}
 * clz.{i,ll}
 * popc.{i,ll}
 * abs.{i,ll}
 * {min,max}.{i,ll,u,ull}
 * h2f

These either map directly to an existing LLVM target-generic
intrinsic or map to a simple LLVM target-generic idiom.

In all cases, we check that the code we generate is lowered to PTX as we
expect.

These builtins don't need to be backfilled in clang: They're not
accessible to user code from nvcc.

Reviewers: tra

Subscribers: majnemer, cfe-commits, llvm-commits, jholewinski

Differential Revision: https://reviews.llvm.org/D28793

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292694 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-21 01:00:32 +00:00
Chad Rosier
ef64b17169 [ARM] Remove rbit intrinsics and autoupgrade to generic bitreverse.
Testing already covered by CodeGen/ARM/rbit.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291587 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-10 19:23:51 +00:00
Chad Rosier
33d492eb19 [AArch64] Add support for lowering bitreverse to the rbit instruction.
Differential Revision: https://reviews.llvm.org/D28379

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291575 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-10 17:20:33 +00:00
Craig Topper
a3ed852d30 [AVX-512] Remove vinsert intrinsics and autoupgrade to native shufflevectors. There are some codegen problems here that I'll try to fix in future commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290864 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-03 05:45:57 +00:00
Craig Topper
be3e531ac2 [AVX-512] Remove vextract intrinsics and autoupgrade to native shufflevectors. This unfortunately generates some really terrible code without VLX support due to v2i1 and v4i1 not being legal.
Hopefully we can improve that in future patches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290863 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-03 05:45:46 +00:00
Craig Topper
48ee9a80ae [AVX-512] Remove masked pmuldq and pmuludq intrinsics and autoupgrade them to unmasked intrinsics plus a select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290583 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-27 05:30:14 +00:00
Craig Topper
2d270b3115 [X86] Remove masking from 512-bit VPERMIL intrinsics in preparation for being able to constant fold them in InstCombineCalls like we do for 128/256-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289350 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-11 01:26:44 +00:00
Craig Topper
df9e980077 [X86] Remove masking from 512-bit PSHUFB intrinsics in preparation for being able to constant fold it in InstCombineCalls like we do for 128/256-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289344 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-10 23:09:43 +00:00
Craig Topper
4715a2cff9 [AVX-512] Remove 128/256 masked vpermil instrinsics and autoupgrade to a select around the unmasked avx1 intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289340 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-10 21:15:52 +00:00
Craig Topper
a1123a921e [X86][IR] Move the autoupgrading of store intrinsics out of the main nested if/else chain. This should buy a little more time against the MSVC limit mentioned in PR31034.
The handlers for stores all return at the end of their block so they can be picked off early.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289339 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-10 21:15:48 +00:00
Craig Topper
fa494a82ff [AVX-512] Remove intrinsics for valignd/q and autoupgrade them to native shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287744 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-23 06:54:55 +00:00
Craig Topper
e5e77e4a92 [AVX-512] Replace masked 16-bit element variable shift intrinsics with new unmasked versions and selects.
The same thing was done to 32-bit and 64-bit element sizes previously.

This will allow us to support these shuffls in InstCombineCalls along with the other variable shift intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287312 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-18 05:04:44 +00:00
Simon Pilgrim
f1f243fd34 [X86][AVX512] Autoupgrade lossless i32/u32 to f64 conversion intrinsics with generic IR
Both the (V)CVTDQ2PD (i32 to f64) and (V)CVTUDQ2PD (u32 to f64) conversion instructions are lossless and can be safely represented as generic SINT_TO_FP/UINT_TO_FP calls instead of x86 intrinsics without affecting final codegen.

LLVM counterpart to D26686

Differential Revision: https://reviews.llvm.org/D26736

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287108 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-16 14:48:32 +00:00
Ayman Musa
49b99259ed [X86][AVX512] Removing llvm x86 intrinsics for _mm_mask_move_{ss|sd} intrinsics.
Differential Revision: https://reviews.llvm.org/D26128



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287087 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-16 09:00:28 +00:00
Craig Topper
614df99de4 [X86] Remove the scalar intrinsics for fadd/fsub/fdiv/fmul
Summary: These intrinsics have been unused for clang for a while. This patch removes them. We auto upgrade them to extractelements, a scalar operation and then an insertelement. This matches the sequence used by clangs intrinsic file.

Reviewers: zvi, delena, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26660

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287083 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-16 05:24:10 +00:00
Craig Topper
436c13969b [X86] Add LLVM version number for each intrinsic handled by auto upgrade for age tracking.
One day we'd like to remove some of this autoupgrade support and it will be easier if we know how long some of it has been around.

Differential Revision: https://reviews.llvm.org/D26321

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286933 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-15 05:04:51 +00:00
Craig Topper
d03c7ac104 [AVX-512] Remove and autoupgrade masked dword/qword variable shift intrinsics to the new unmasked versions and selects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286786 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-14 01:53:22 +00:00
Craig Topper
5eb34e8e29 [X86][IR] Reduce the number of full string comparisons in the code that autoupgrades masked shift intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286768 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-13 19:09:56 +00:00
Igor Breger
b70e96e258 revert commit r286761, some builds failed on Win platforms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286765 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-13 15:48:11 +00:00
Ayman Musa
061d58f00f [X86][AVX512] Removing llvm x86 intrinsics for _mm_mask_move_{ss|sd} intrinsics.
Differential Revision: https://reviews.llvm.org/D26128



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286761 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-13 14:51:25 +00:00
Craig Topper
7aa2751105 [AVX-512] Remove the remaining masked shift by immediate or by single value. Autoupgrade them to recently introduced unmasked versions and a select.
After this I'll add the unmasked intrinsics to InstCombineCalls to finish making our handling of these types of shuffles consistent between AVX-512 and the legacy intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286725 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-12 18:04:46 +00:00
George Burgess IV
ba372980dc Add a missing break statement. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286203 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-08 04:01:50 +00:00
Craig Topper
e69277c6bf [AVX-512] Remove masked pmovzx/pmovsx builtins and autoupgrade them to selects and native zext/sext.
This mostly reuses earlier autoupgrade support for the sse and avx equivalents. Just needed to add the code to add the select.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286092 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-07 02:12:57 +00:00
Craig Topper
e132a76033 [X86] Use StringRef::startswith to reduce a few compares in the intrinsic autoupgrade code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286090 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-07 00:13:42 +00:00
Craig Topper
9fd28c59b7 [AVX-512] Remove 128/256 masked pshufb intrinsics. Autoupgrade them to legacy intrinsics and a select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286089 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-07 00:13:39 +00:00
Craig Topper
90419a0ef5 [AVX-512] Remove intrinsics for 128/256-bit masked variable shift. Instead upgrade them to a select and the older AVX2 intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286073 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-06 16:29:19 +00:00
Craig Topper
4734b821e2 [AVX-512] Remove intrinsics for 128/256-bit masked shift by immediate. Instead upgrade them to a select and the older SSE/AVX2 intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286072 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-06 16:29:14 +00:00
Craig Topper
cd57e732e4 [AVX-512] Remove intrinsics for 128/256-bit masked shift by single element in xmm. Instead upgrade them to a select and the older SSE/AVX2 intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286070 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-06 16:29:08 +00:00
Craig Topper
de7c14666a [AVX-512] Use an equality compare instead of StringRef::startswith in a few places in auto upgrade that were looking for the complete intrinsic name anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286033 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-05 05:35:23 +00:00
Craig Topper
cf48862cf8 [X86] Remove broken support for autoupgrading llvm.x86.fma4.* intrinsics to llvm.x86.fma.*.
It currently fires an assert if you even try. Looking back, I don't think it ever worked because it only changed the name of the function object, but not the intrinsic ID stored in it. Given that, I think it can be removed since no one has noticed or complained in the past 4 years.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286031 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-05 04:00:31 +00:00
Craig Topper
bc9b41f1b1 [AVX-512] Remove masked pmin/pmax intrinsics and autoupgrade to native IR.
Clang patch to replace 512-bit vector and 64-bit element versions with native IR will follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284955 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-24 04:04:16 +00:00
Rafael Espindola
da49ba4e37 Don't drop the llvm. prefix when renaming.
If the llvm. prefix is dropped other parts of llvm don't see this as
an intrinsic.  This means that the number of regular symbols depends
on the context the module is loaded into, which causes LTO to abort.

Fixes PR30509.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283117 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-03 15:51:42 +00:00
Mehdi Amini
ff48266144 Fix autoupgrade logic for Objective-C class properties module flag
Previous we were issuing an error when linking a module containing
the new Objective-C metadata structure for class properties with an
"old" one.
Now instead we downgrade the module flag so that the Objective-C
runtime does not expect the new metadata structure.

This is consistent with what ld64 is doing on binary files.

Differential Revision: https://reviews.llvm.org/D24620

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281685 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-16 00:38:18 +00:00
Mehdi Amini
a364825f51 Fix auto-upgrade of TBAA tags in Bitcode Reader
If TBAA is on an intrinsic and it gets upgraded, it'll delete the call
instruction that we collected in a vector. Even if we were to use
WeakVH, it'll drop the TBAA and we'll hit the assert on the upgrade
path.

r263673 gave a shot to make sure the TBAA upgrade happens before
intrinsics upgrade, but failed to account for all cases.

Instead of collecting instructions in a vector, this patch makes it
just upgrade the TBAA on the fly, because metadata are always
already loaded at this point.

Differential Revision: https://reviews.llvm.org/D24533

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281549 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 22:29:59 +00:00
Craig Topper
5db4eb4adf [X86] Remove masked shufpd/shufps intrinsics and autoupgrade to native vector shuffles. They were removed from clang previously but accidentally left in the backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281300 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 07:40:53 +00:00
Craig Topper
3a32e24112 [AVX-512] Remove 128-bit and 256-bit masked floating point add/sub/mul/div intrinsics and upgrade to native IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280633 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-04 18:13:33 +00:00
Craig Topper
d88c98e923 [AVX-512] Remove masked integer add/sub/mull intrinsics and upgrade to native IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280611 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-04 02:09:53 +00:00
Craig Topper
1ce43697d1 [X86] Combine some of the strings in autoupgrade code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280603 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-03 23:55:13 +00:00
Craig Topper
5b553d0a68 [AVX-512] Remove floating point logical operation instrinsics and replace them with native IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280466 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-02 05:29:17 +00:00
Mehdi Amini
804c815e77 Revert "Revert "Invariant start/end intrinsics overloaded for address space""
This reverts commit 32fc6488e48eafc0ca1bac1bd9cbf0008224d530.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278609 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 23:31:24 +00:00
Mehdi Amini
2eb84a568a Revert "Invariant start/end intrinsics overloaded for address space"
This reverts commit r276447.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278608 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 23:27:32 +00:00
David Majnemer
dc9c737666 Use range algorithms instead of unpacking begin/end
No functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278417 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-11 21:15:00 +00:00
Chandler Carruth
430591fd27 [x86] Fix a bug in the auto-upgrade from r276416 where we failed to give
a sufficiently low alignment for the IR load created.

There is no test case because we don't have any test cases for the *IR*
produced by the autoupgrade, only the x86 assembly, and it happens that
the x86 assembly for this intrinsic as it is tested in the autoupgrade
path just happens to not produce a separate load instruction where we
might have observed the alignment.

I'm going to follow up on the original commit to suggest getting
IR-level testing in addition to the asm level testing here so that we
can see and test these kinds of issues. We might never get an x86
instruction out with an alignment constraint, but we could stil
miscompile code by folding against the alignment marked on (or inferred
for in this case) the load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278203 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-10 07:41:26 +00:00
Anna Thomas
80ee170cb3 Invariant start/end intrinsics overloaded for address space
Summary:
The llvm.invariant.start and llvm.invariant.end intrinsics currently
support specifying invariant memory objects only in the default address
space.

With this change, these intrinsics are overloaded for any adddress space
for memory objects
and we can use these llvm invariant intrinsics in non-default address
spaces.

Example: llvm.invariant.start.p1i8(i64 4, i8 addrspace(1)* %ptr)

This overloaded intrinsic is needed for representing final or invariant
memory in managed languages.

Reviewers: apilipenko, reames

Subscribers: llvm-commits

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276447 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-22 17:49:40 +00:00