Commit Graph

140664 Commits

Author SHA1 Message Date
Oliver Stannard
4a04eb017b [ARM] Thumb2 LDR (literal) should accept PC as the destination
The version of this instruction with the .w suffix already correctly accepts
this, but the alias without the .w did not.

Differential Revision: https://reviews.llvm.org/D26499



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286446 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-10 13:20:41 +00:00
Sanjoy Das
b2e86a3cab [SCEVExpander] Hoist unsigned divisons when safe
That is, when the divisor is a constant non-zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286438 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-10 07:56:12 +00:00
Sanjoy Das
ea50f98cad [SCEVExpander] Don't hoist divisions
Fixes PR30942.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286437 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-10 07:56:09 +00:00
Sanjoy Das
32c88043af Lift out a helper lambda; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286436 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-10 07:56:05 +00:00
Craig Topper
79013e50a6 [AVX-512] Allow legacy cvtpd2dq intrinsics to select EVEX encoded instruction when available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286435 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-10 07:47:17 +00:00
Craig Topper
89432488d2 [AVX-512][X86] Convert avx_cvtt_ps2dq_256 and sse2_cvttps2dq intrinsics to ISD::FP_TO_SINT in the intrinsics table and delete patterns. While nearby also move CVTDQ2PS patterns into their instructions.
This allows these intrinsics to also use EVEX instructons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286434 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-10 07:24:52 +00:00
Craig Topper
70894ee006 [X86] Convert int_x86_avx_cvtt_pd2dq_256 to fp_to_sint using the intrinsics table. Removes extra patterns and allows legacy intrinsic to select EVEX encoded instructions when available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286433 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-10 06:45:39 +00:00
Craig Topper
7cf26e1149 [X86] Move some custom patterns into the currently empty pattern of their corresponding instructions. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286432 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-10 06:45:37 +00:00
Craig Topper
66d2306248 [X86] Remove some patterns still referencing int_x86_sse2_cvttpd2dq that should have been removed in r286344. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286431 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-10 06:45:34 +00:00
Sanjoy Das
2513e7561c [SCEV] Eta reduce some lambdas; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286429 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-10 06:33:54 +00:00
Sanjoy Das
40cc2d91fd [LangRef] Drop "experimental" caveat from operand bundles
I think we're past that point now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286428 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-10 06:21:10 +00:00
Craig Topper
5ffdf013bf [AVX-512] Add test cases to show missed opportunities for using VALIGND/Q to handle shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286425 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-10 03:39:19 +00:00
Sanjay Patel
9c5e4bac4a [InstCombine] avoid infinite loop from shuffle-extract-insert sequence (PR30923)
Removing the limitation in visitInsertElementInst() causes several regressions
because we're not prepared to fold sequences of shuffles or inserts and extracts
separated by shuffles. Fixing that appears to be a difficult mission because we
are purposely trying to avoid creating shuffles with arbitrary shuffle masks
because some targets may choke on those.

https://llvm.org/bugs/show_bug.cgi?id=30923


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286423 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-10 00:15:14 +00:00
Peter Collingbourne
027f4d03c6 Re-apply r286384, "X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate.", with a fix for 32-bit x86.
Teach X86InstrInfo::analyzeCompare() not to crash on CMP and SUB instructions
that take a global address operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286420 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 23:53:43 +00:00
Dylan McKay
619ca04281 [AVR] Add a selection of CodeGen tests
Summary: This adds all of the CodeGen tests which currently pass.

Reviewers: arsenm, kparzysz

Subscribers: japaric, wdng

Differential Revision: https://reviews.llvm.org/D26388

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286418 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 23:46:52 +00:00
Dylan McKay
64af2512f1 [AVR] Add all of the machine code test suite
Summary: This adds all of the AVR machine code tests.

Reviewers: arsenm, kparzysz

Subscribers: wdng, japaric

Differential Revision: https://reviews.llvm.org/D26387

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286417 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 23:46:25 +00:00
Dehao Chen
35ce2dbc66 Add isHotBB helper function to ProfileSummaryInfo
Summary: This will unify all BB hotness checks.

Reviewers: eraman, davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26353

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286415 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 23:36:02 +00:00
Eli Friedman
0e23db6f4e Preserve assumption cache in loop-rotate.
No testcase included because I can't figure out how to reduce it.
(It's easy to write a testcase where rotation clones an assume,
but that doesn't actually seem to trigger the crash in opt on
its own; maybe an issue with the laziness?)

Differential Revision: https://reviews.llvm.org/D26434



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286410 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 23:05:01 +00:00
Tim Northover
5224b5a0c9 GlobalISel: fix typo. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286408 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 22:40:02 +00:00
Tim Northover
e6797b7d75 GlobalISel: translate invoke and landingpad instructions
Pretty bare-bones support for exception handling (no weird MSVC stuff, no SjLj
etc), but it should get things going.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286407 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 22:39:54 +00:00
Dehao Chen
746789378b Update vectorization debug info unittest.
Summary:
The change will test the change in r286159.
The idea behind the change: Make the dbg location different between loop header and preheader/exit. Originally, dbg location 21 exists in 3 BBs: preheader, header, critical edge (exit). Update the debug location of inside the loop header from !21 to !22 so that it will reflect the correct location.

Reviewers: probinson

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26428

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286403 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 22:25:19 +00:00
Sanjay Patel
b347251bf7 [InstCombine] regenerate checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286402 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 22:21:58 +00:00
Sanjay Patel
c4a40a2d62 [InstCombine] regenerate checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286399 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 21:41:34 +00:00
Davide Italiano
003472894d [tools] Unbreak the GCC build (workaround a GCC bug).
../tools/llvm-extract/llvm-extract.cpp: In function ‘int main(int, char**)’:
warning: ISO C++ forbids zero-size array ‘argv’ [-Wpedantic]

GCC reference bug https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61259

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286396 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 21:30:33 +00:00
Mehdi Amini
d964c86571 Make BitcodeReader::parseIdentificationBlock() robust to EOF
This method is particular: it iterates at the top-level and does
not have an enclosing block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286394 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 21:26:49 +00:00
Evgeny Stupachenko
faf81d7b4b Minor unroll pass refacoring.
Summary:
Unrolled Loop Size calculations moved to a function.
Constant representing number of optimized instructions
 when "back edge" becomes "fall through" replaced with
 variable.
Some comments added.

Reviewers: mzolotukhin

Differential Revision: http://reviews.llvm.org/D21719

From: Evgeny Stupachenko <evstupac@gmail.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286389 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 19:56:39 +00:00
Sanjoy Das
e77b2fd047 [Verifier] clang-format a section; NFC
Suggested in D26438 since I'm touching related code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286388 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 19:36:39 +00:00
Sanjoy Das
e3d8a20a5e [SCEV] Refactor out a useful pattern; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286386 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 18:22:43 +00:00
Peter Collingbourne
7deb9eea89 Revert r286384, "X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate."
Suspected to be the cause of a sanitizer-windows bot failure:
Assertion failed: isImm() && "Wrong MachineOperand accessor", file C:\b\slave\sanitizer-windows\llvm\include\llvm/CodeGen/MachineOperand.h, line 420

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286385 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 18:17:50 +00:00
Peter Collingbourne
7e3e10aad3 X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate.
A relocatable immediate is either an immediate operand or an operand that
can be relocated by the linker to an immediate, such as a regular symbol
in non-PIC code.

Start using relocImm for 32-bit and 64-bit MOV instructions, and for operands
of type "imm32_su". Remove a number of now-redundant patterns.

Differential Revision: https://reviews.llvm.org/D25812

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286384 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 17:51:58 +00:00
Krzysztof Parzyszek
d73ad9fe77 [Hexagon] Silence "sometimes uninitialized" warning in HexagonCopyToCombine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286383 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 17:50:46 +00:00
Peter Collingbourne
76c218e094 Bitcode: Change the materializer interface to return llvm::Error.
Differential Revision: https://reviews.llvm.org/D26439

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286382 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 17:49:19 +00:00
Krzysztof Parzyszek
5d84a0761e [Hexagon] Separate Hexagon subreg indices for different register classes
For pairs of 32-bit registers: isub_lo, isub_hi.
For pairs of vector registers: vsub_lo, vsub_hi.

Add generic subreg indices: ps_sub_lo, ps_sub_hi, and a function
  HexagonRegisterInfo::getHexagonSubRegIndex(RegClass, GenericSubreg)
that returns the appropriate subreg index for RegClass.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286377 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 16:19:08 +00:00
Krzysztof Parzyszek
0f89628001 [Hexagon] Eliminate Insert4 pseudo-instruction, use combines instead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286368 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 14:16:29 +00:00
Jonas Paulsson
e6c9f7f938 [SystemZ] A few fixes in scheduler files.
Review: U Weigand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286362 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 12:47:57 +00:00
Pavel Labath
15f3ab0cb6 Remove TimeValue usage from Scalar/SROA.cpp. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286361 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 12:07:12 +00:00
Pavel Labath
517cd170c3 Zero-initialize chrono duration objects
The default duration constructor does not zero-initialize the object, we need to
do that manually.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286359 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 11:43:57 +00:00
Pavel Labath
73ce0c00e4 [dsymutil] Replace TimeValue with TimePoint
Summary:
All changes are pretty straight-forward. I chose to use TimePoints with
second precision, as that is all that seems to be required here.

Reviewers: friss, zturner

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25908

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286358 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 11:43:52 +00:00
Simon Atanasyan
6192bd795f [mips] Add non-const getter for the Elf_Mips_Options class. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286351 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 10:14:55 +00:00
Jonas Paulsson
e9ba8f332a [MachineScheduler] Comments fixing.
The name/comment of the third argument to the ScheduleDAGMI constructor
is RemoveKillFlags and not IsPostRA. Only the comments are changed.

Review: A Trick

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286350 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 09:59:27 +00:00
Alexandros Lamprineas
32054b584b [ARM] Loop Strength Reduction crashes when targeting ARM or Thumb.
Scalar Evolution asserts when not all the operands of an Add Recurrence
Expression are loop invariants. Loop Strength Reduction should only
create affine Add Recurrences, so that both the start and the step of
the expression are loop invariants.

Differential Revision: https://reviews.llvm.org/D26185

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286347 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 08:53:07 +00:00
Craig Topper
1f641ae1c5 [AVX-512] Add lowering to cvttpd2udq/cvttps2udq for fptoui v2f64/2f32 to 2i32
This patch adds support for fptoui to 2i32 from both 2f64 and 2f32, building on Simon's change for the signed version in r284459 and using AVX-512 instructions.

If we don't have VLX support we need to use a 512-bit operation for v2f64->v2i32 and extract the result.

It also recognises that cvttpd2udq zeroes the upper 64-bits of the xmm result.

Differential Revision: https://reviews.llvm.org/D26331

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286345 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 07:48:51 +00:00
Craig Topper
45b3e8f9df [X86] Lower AVX512 and SSE intrinsics for CVTTPD2DQ to X86ISD::CVTTPD2DQ.
Summary: This allows the SSE intrinsic to use the EVEX instruction when available. It also fixes EVEX to not use a weird (v4i32 (fp_to_sint v2f64)) node and it merges some isel patterns. This also fixes some cases that weren't combining vzmovl with cvttpd2dq to remove extra moves.

Reviewers: delena, zvi, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26330

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286344 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 07:31:32 +00:00
Craig Topper
106bb1fe2d [AVX-512] Add more varied alignments to tests for storing the lower 128-bits of a 256 or 512-bit subvector extract.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286343 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 05:38:47 +00:00
Craig Topper
4c1b9a2ab6 [AVX-512] Use alignedstore256 in patterns that look for stores of the lower 256-bits of a 512-bit vector to use a 256-bit aligned store.
Previously we were only checking for 16 byte alignment instead of 32 byte alignment. Fixes PR30947.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286342 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 05:31:57 +00:00
Craig Topper
89f0495611 [AVX-512] Add test cases to demonstrate PR30947. We accidentally use 32 byte aligned store instructions when the original store was only 16 byte aligned if the store is from the lower bits of a subvector extract.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286341 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 05:31:53 +00:00
Craig Topper
f43d5aff8d [AVX-512] Make VBMI instruction set enabling imply that the BWI instruction set is also enabled.
Summary:
This is needed to make the v64i8 and v32i16 types legal for the 512-bit VBMI instructions. Fixes PR30912.

Reviewers: delena, zvi

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26322

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286339 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 04:50:48 +00:00
Dean Michael Berris
2adde22ecd [XRay][docs] Fix llvm snippets to be well-formed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286330 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 02:12:13 +00:00
Mehdi Amini
129c9fcdb8 Revert "[ThinLTO] Prevent exporting of locals used/defined in module level asm"
This reverts commit r286297.
Introduces a dependency from libAnalysis to libObject, which I missed
during the review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286329 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 01:45:13 +00:00
Mehdi Amini
9e4483688b [doc] Remove explicit CMake version requirement for MSVC
The global minimum one is way past this version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286328 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-09 01:44:42 +00:00