Commit Graph

16 Commits

Author SHA1 Message Date
Matthias Braun
2aa5727755 TargetRegisterInfo: Provide a way to check assigned registers in getRegAllocationHints()
Pass a const reference to LiveRegMatrix to getRegAllocationHints()
because some targets can prodive better hints if they can test whether a
physreg has been used for register allocation yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242340 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 22:16:00 +00:00
Benjamin Kramer
b453775cc2 [CodeGen] Reduce visibility of implementation details
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241164 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 14:47:39 +00:00
Benjamin Kramer
00e08fcaa0 Canonicalize header guards into a common format.
Add header guards to files that were missing guards. Remove #endif comments
as they don't seem common in LLVM (we can easily add them back if we decide
they're useful)

Changes made by clang-tidy with minor tweaks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215558 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-13 16:26:38 +00:00
Aditya Nandakumar
226e3eab9b Check hint registers for interference only once before evictions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196536 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 21:18:40 +00:00
Benjamin Kramer
55c06ae7af Revert "Give internal classes hidden visibility."
It works with clang, but GCC has different rules so we can't make all of those
hidden. This reverts commit r190534.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190536 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-11 18:05:11 +00:00
Benjamin Kramer
15f387c93e Give internal classes hidden visibility.
Worth 100k on a linux/x86_64 Release+Asserts clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190534 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-11 17:42:27 +00:00
Jakob Stoklund Olesen
6d6132986d Limit the search space in RAGreedy::tryEvict().
When tryEvict() is looking for a cheaper register in the allocation
order, skip the tail of too expensive registers when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172281 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-12 00:57:44 +00:00
Jakob Stoklund Olesen
f7999fe1cb Speed up the AllocationOrder class a bit.
Allow the central functions to be inlined, and use the argumentless
isHint() function when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169319 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 22:25:16 +00:00
Chandler Carruth
a1514e24cc Sort includes for all of the .h files under the 'lib' tree. These were
missed in the first pass because the script didn't yet handle include
guards.

Note that the script is now able to handle all of these headers without
manual edits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169224 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 07:12:27 +00:00
Jakob Stoklund Olesen
fc29db1214 Use the new getRegAllocationHints() hook from AllocationOrder.
This simplifies the hinting code quite a bit while making the targets
easier to write at the same time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169173 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 22:51:04 +00:00
Jakob Stoklund Olesen
39b5c0c049 Use MCPhysReg for RegisterClassInfo allocation orders.
This saves a bit of memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168852 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 03:34:17 +00:00
Jakob Stoklund Olesen
10c6fdcd11 Fix old doxygen comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148825 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 18:09:18 +00:00
Jakob Stoklund Olesen
a46a100945 Get allocation orders from RegisterClassInfo when possible.
Only target-dependent hints require callbacks. The RCI allocation order
has CSR aliases last according to their order of appearance in the
getCalleeSavedRegs list. This can depend on the calling convention.

This way, AllocationOrder::next doesn't have to check for reserved
registers, and CSRs are always allocated last, even with weird calling
conventions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132690 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-06 21:02:04 +00:00
Jakob Stoklund Olesen
5f2316a3b5 Switch AllocationOrder to using RegisterClassInfo instead of a BitVector
of reserved registers.

Use RegisterClassInfo in RABasic as well. This slightly changes som
allocation orders because RegisterClassInfo puts CSR aliases last.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132581 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 20:34:53 +00:00
Jakob Stoklund Olesen
57f1e2cee0 Try harder to get the hint by preferring to evict hint interference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126463 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-25 01:04:22 +00:00
Jakob Stoklund Olesen
c9672cb8be Add an AllocationOrder class that can iterate over the allocatable physical
registers for a given virtual register.

Reserved registers are filtered from the allocation order, and any valid hint is
returned as the first suggestion.

For target dependent hints, a number of arcane target hooks are invoked.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121497 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 18:36:02 +00:00