19102 Commits

Author SHA1 Message Date
Renato Golin
7809bb2e96 Revert "Divide the primitive size in bits by eight so the initial load's alignment is in bytes as expected. Tested with the included unit test."
This reverts commit r244155, as it was breaking the buildbots for too long.
Should be reapplied with proper fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244205 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-06 10:37:59 +00:00
Chandler Carruth
734c778cb2 [PM/AA] Hoist the interface for BasicAA into a header file.
This is the first mechanical step in preparation for making this and all
the other alias analysis passes available to the new pass manager. I'm
factoring out all the totally boring changes I can so I'm moving code
around here with no other changes. I've even minimized the formatting
churn.

I'll reformat and freshen comments on the interface now that its located
in the right place so that the substantive changes don't triger this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244197 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-06 07:33:15 +00:00
Chandler Carruth
da5300489f [PM/AA] Simplify the AliasAnalysis interface by removing a wrapper
around a DataLayout interface in favor of directly querying DataLayout.

This wrapper specifically helped handle the case where this no
DataLayout, but LLVM now requires it simplifynig all of this. I've
updated callers to directly query DataLayout. This in turn exposed
a bunch of places where we should have DataLayout readily available but
don't which I've fixed. This then in turn exposed that we were passing
DataLayout around in a bunch of arguments rather than making it readily
available so I've also fixed that.

No functionality changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244189 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-06 02:05:46 +00:00
Alex Lorenz
3c99e77ff9 MIR Serialization: Initial serialization of the machine operand target flags.
This commit implements the initial serialization of the machine operand target
flags. It extends the 'TargetInstrInfo' class to add two new methods that help
to provide text based serialization for the target flags.

This commit can serialize only the X86 target flags, and the target flags for
the other targets will be serialized in the follow-up commits.

Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244185 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-06 00:44:07 +00:00
Reid Kleckner
defbd1fbf1 If the "CodeView" module flag is set, emit codeview instead of DWARF
Summary:
Emit both DWARF and CodeView if "CodeView" and "Dwarf Version" module
flags are set.

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11756

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244158 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 22:26:20 +00:00
Alex Lorenz
a41742659a MIR Serialization: Serialize the machine operand's offset.
This commit serializes the offset for the following operands: target index,
global address, external symbol, constant pool index, and block address.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244157 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 22:26:15 +00:00
Richard Diamond
fceb978fd3 Divide the primitive size in bits by eight so the initial load's alignment is in
bytes as expected. Tested with the included unit test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244155 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 22:10:57 +00:00
Cong Hou
3f81410d8c Record whether the weights on out-edges from a MBB are normalized.
1. Create a utility function normalizeEdgeWeights() in MachineBranchProbabilityInfo that normalizes a list of edge weights so that the sum of then can fit in uint32_t.
2. Provide an interface in MachineBasicBlock to normalize its successors' weights.
3. Add a flag in MachineBasicBlock that tracks whether its successors' weights are normalized.
4. Provide an overload of getSumForBlock that accepts a non-const pointer to a MBB so that it can force normalizing this MBB's successors' weights.
5. Update several uses of getSumForBlock() by eliminating the once needed weight scale.

Differential Revision: http://reviews.llvm.org/D11442



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244154 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 22:01:20 +00:00
JF Bastien
3e8a65d346 Revert "Fix MO's analyzePhysReg, it was confusing sub- and super-registers. Problem pointed out by Michael Hordijk."
I mistakenly committed the patch for D6629, and was trying to commit another. Reverting until it gets proper signoff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244121 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 20:53:56 +00:00
JF Bastien
a41cc3c3b8 Fix MO's analyzePhysReg, it was confusing sub- and super-registers. Problem pointed out by Michael Hordijk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244120 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 20:49:46 +00:00
Richard Diamond
8e501923ae Write access test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244103 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 19:40:39 +00:00
Alex Lorenz
97214282e0 MIR Parser: Report an error when parsing large immediate operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244100 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 19:03:42 +00:00
Alex Lorenz
c2b7a3917e MIR Serialization: Serialize the typed immediate integer machine operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244098 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 18:52:21 +00:00
Alex Lorenz
bed9b2f749 MIR Parser: Extract the IR constant parsing code into a new method. NFC.
This commit extracts the code that parses the IR constant values into a new
method named 'parseIRConstant' in the 'MIParser' class. The new method will
be reused by the code that parses the typed integer immediate machine operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244093 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 18:44:00 +00:00
Alex Lorenz
0f3be315d6 MIR Parser: Report an error when parsing duplicate register flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244081 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 18:09:03 +00:00
Chandler Carruth
da49414c4b [TTI] Make the cost APIs in TargetTransformInfo consistently use 'int'
rather than 'unsigned' for their costs.

For something like costs in particular there is a natural "negative"
value, that of savings or saved cost. As a consequence, there is a lot
of code that subtracts or creates negative values based on cost, all of
which is prone to awkwardness or bugs when dealing with an unsigned
type. Similarly, we *never* want these values to wrap, as that would
cause Very Bad code generation (likely percieved as an infinite loop as
we try to emit over 2^32 instructions or some such insanity).

All around 'int' seems a much better fit for these basic metrics. I've
added asserts to ensure that at least the TTI interface never returns
negative numbers here. If we ever have a use case for negative numbers,
we can remove this, but this way a bug where someone used '-1' to
produce a 'very large' cost will be caught by the assert.

This passes all tests, and is also UBSan clean.

No functional change intended.

Differential Revision: http://reviews.llvm.org/D11741

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244080 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 18:08:10 +00:00
Alex Lorenz
e40350d020 MIR Serialization: Serialize the 'early-clobber' register operand flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244075 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 17:49:03 +00:00
Alex Lorenz
13fa799e5f MIR Serialization: Serialize the 'debug-use' register operand flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244071 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 17:41:17 +00:00
Alex Lorenz
1613aa08d6 MIR Parser: Simplify the handling of quoted tokens. NFC.
The machine instructions lexer should not expose the difference between quoted
and unquoted tokens to the parser.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244068 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 17:35:55 +00:00
Sanjay Patel
3e95f49778 revert r243687: enable fast-math-flag propagation to DAG nodes
We can't propagate FMF partially without breaking DAG-level CSE. We either need to
relax CSE to account for mismatched FMF as a temporary work-around or fully propagate
FMF throughout the DAG.

Surprisingly, there are no existing regression tests for this, but here's an example:

  define float @fmf(float %a, float %b) {
    %mul1 = fmul fast float %a, %b
    %nega = fsub fast float 0.0, %a
    %mul2 = fmul fast float %nega, %b
    %abx2 = fsub fast float %mul1, %mul2
    ret float %abx2
  }


$ llc -o - badflags.ll -march=x86-64 -mattr=fma -enable-unsafe-fp-math -enable-fmf-dag=0
...
    vmulss    %xmm1, %xmm0, %xmm0
    vaddss    %xmm0, %xmm0, %xmm0
    retq

$ llc -o - badflags.ll -march=x86-64 -mattr=fma -enable-unsafe-fp-math -enable-fmf-dag=1
...
    vmulss    %xmm1, %xmm0, %xmm2
    vfmadd213ss    %xmm2, %xmm1, %xmm0  <--- failed to recognize that (a * b) was already calculated
    retq



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244053 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 15:12:03 +00:00
Hal Finkel
7b3dad09cd [MachineCombiner] Don't use the opcode-only form of computeInstrLatency
In r242277, I updated the MachineCombiner to work with itineraries, but I
missed a call that is scheduling-model-only (the opcode-only form of
computeInstrLatency). Using the form that takes an MI* allows this to work with
itineraries (and should be NFC for subtargets with scheduling models).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244020 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 07:45:28 +00:00
Sanjay Patel
f360983642 wrap OptSize and MinSize attributes for easier and consistent access (NFCI)
Create wrapper methods in the Function class for the OptimizeForSize and MinSize
attributes. We want to hide the logic of "or'ing" them together when optimizing
just for size (-Os).

Currently, we are not consistent about this and rely on a front-end to always set
OptimizeForSize (-Os) if MinSize (-Oz) is on. Thus, there are 18 FIXME changes here
that should be added as follow-on patches with regression tests.

This patch is NFC-intended: it just replaces existing direct accesses of the attributes
by the equivalent wrapper call.

Differential Revision: http://reviews.llvm.org/D11734



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243994 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-04 15:49:57 +00:00
Hal Finkel
647faa9bd9 [SDAG] Fix a result chain in ExpandUnalignedLoad
On the code path in ExpandUnalignedLoad which expands an unaligned vector/fp
value in terms of a legal integer load of the same size, the ChainResult needs
to be the chain result of the integer load.

No in-tree test case is currently available.

Patch by Jan Hranac!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243956 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-04 06:29:12 +00:00
Chen Li
7b3ed76a63 Introduce enum value for previously defined metadata -- make.implicit
Summary: This patch adds enum value for an existing metadata type -- make.implicit. Using preassigned enum will be helpful to get compile time type checking and avoid string construction and comparison. The patch also changes uses of make.implicit from string metadata to enum metadata. There is no functionality change.

Reviewers: reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11698

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243954 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-04 04:41:34 +00:00
Ahmed Bougacha
5ce70cc2c1 [CodeGen] Fix FCOPYSIGN legalization to account for mismatched types.
We used to legalize it like it's any other binary operations.  It's not,
because it accepts mismatched operand types.  Because of that, we used
to hit various asserts and miscompiles.

Specialize vector legalizations to, in the worst case, unroll, or, when
possible, to just legalize the operand that needs legalization.

Scalarization isn't covered, because I can't think of a target where
some but not all of the 1-element vector types are to be scalarized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243924 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-04 00:32:55 +00:00
Alex Lorenz
1731b66081 MIR Serialization: Serialize the 'volatile' machine memory operand flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243923 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-04 00:24:45 +00:00
Alex Lorenz
3db44ce9a8 MIR Serialization: Initial serialization of the machine memory operands.
Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243915 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-03 23:08:19 +00:00
David Blaikie
c4423f0478 -Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are deprecated in C++11
Various value handles needed to be copy constructible and copy
assignable (mostly for their use in DenseMap). But to avoid an API that
might allow accidental slicing, make these members protected in the base
class and make derived classes final (the special members become
implicitly public there - but disallowing further derived classes that
might be sliced to the intermediate type).

Might be worth having a warning a bit like -Wnon-virtual-dtor that
catches public move/copy assign/ctors in classes with virtual functions.
(suppressable in the same way - by making them protected in the base,
and making the derived classes final) Could be fancier and only diagnose
them when they're actually called, potentially.

Also allow a few default implementations where custom implementations
(especially with non-standard return types) were implemented.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243909 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-03 22:30:24 +00:00
David Blaikie
43247f1977 -Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are deprecated in C++11
Some functions return concrete ByteStreamers by value - explicitly
support that in the base class. (dtor can be virtual, no one seems to be
polymorphically owning/destroying them)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243897 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-03 20:12:58 +00:00
JF Bastien
ca0cc47046 Refactor AtomicExpand::expandAtomicRMWToCmpXchg into a standalone function.
Summary:
This is useful for PNaCl's `RewriteAtomics` pass. NaCl intrinsics don't exist for some of the more exotic RMW instructions, so by refactoring this function into its own, `RewriteAtomics` can share code rewriting those atomics with `AtomicExpand` while additionally saving a few cycles by generating the `cmpxchg` NaCl-specific intrinsic with the callback. Without this patch, `RewriteAtomics` would require two extra passes over functions, by first requiring use of the full `AtomicExpand` pass to just expand the leftover exotic RMWs and then running itself again to expand resulting `cmpxchg`s.

NFC

Reviewers: jfb

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D11422

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243880 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-03 15:29:47 +00:00
John Brawn
583fe8f203 [GlobalMerge] Allow targets to enable merging of extern variables, NFC.
Adjust the GlobalMergeOnExternal option so that the default behaviour is to
do whatever the Target thinks is best. Explicitly enabled or disabling the
option will override this default.

Differential Revision: http://reviews.llvm.org/D10965


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243873 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-03 12:08:41 +00:00
Duncan P. N. Exon Smith
94404e8097 AsmPrinter: Split out non-DIE printing from DIE::print(), NFC
Split out a helper `printValues()` for printing `DIEBlock` and `DIELoc`,
instead of relying on `DIE::print()`.  The shared code was actually
fairly small there.  No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243856 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-02 20:46:49 +00:00
Duncan P. N. Exon Smith
69e4c2fc86 AsmPrinter: Take DIEValueList in some DwarfUnit API, NFC
Take `DIEValueList` instead of `DIE` so that `DIEBlock` and `DIELoc` can
stop inheriting from `DIE` in a future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243855 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-02 20:44:46 +00:00
Duncan P. N. Exon Smith
bc3c2c319c AsmPrinter: Change DIEValueList to a subclass of DIE, NFC
Rewrite `DIEValueList` as a subclass of `DIE`, renaming its API to match
`DIE`'s.  This is preparation for changing `DIEBlock` and `DIELoc` to
stop inheriting from `DIE` and inherit directly from `DIEValueList`.

I thought about leaving this as a has-a relationship (and changing
`DIELoc` and `DIEBlock` to also have-a `DIEValueList`), but that seemed
to require a fair bit more boilerplate and I think it needed more
changes to the `DwarfUnit` API than this will.

No functionality change intended here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243854 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-02 20:42:45 +00:00
Simon Pilgrim
93ed1b3388 Remove trailing whitespace. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243838 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 17:06:47 +00:00
Simon Pilgrim
c87d0b570d Use SDValue bool check. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243837 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 17:05:50 +00:00
Simon Pilgrim
fa2c240c15 [DAGCombiner] Convert constant AND masks to shuffle clear masks down to the byte level
The XformToShuffleWithZero method currently checks AND masks at the per-lane level for all-one and all-zero constants and attempts to convert them to legal shuffle clear masks.

This patch generalises XformToShuffleWithZero, splitting and checking the sub-lanes of the constants down to the byte level to see if any legal shuffle clear masks are possible. This allows a lot of masks (often from legalization or truncation) to be folded into existing shuffle patterns and removes a lot of constant mask loading.

There are a few examples of poor shuffle lowering that are exposed by this patch that will be cleaned up in future patches (e.g. merging shuffles that are separated by bitcasts, x86 legalized v8i8 zero extension uses PMOVZX+AND+AND instead of AND+PMOVZX, etc.)

Differential Revision: http://reviews.llvm.org/D11518

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243831 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 10:01:46 +00:00
Alex Lorenz
c198b23a4d MIR Parser: Report an error when a jump table entry is redefined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243798 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 23:13:23 +00:00
Alex Lorenz
faa33cdc3c MIR Parser: Remove unused variable.
This variable is unused as of r243572.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243796 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 22:59:20 +00:00
Alex Lorenz
c225eda1f1 MIR Serialization: Serialize the floating point immediate machine operands.
Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243780 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 20:49:21 +00:00
Duncan P. N. Exon Smith
bf2040f00c DI: Remove DW_TAG_arg_variable and DW_TAG_auto_variable
Remove the fake `DW_TAG_auto_variable` and `DW_TAG_arg_variable` tags,
using `DW_TAG_variable` in their place Stop exposing the `tag:` field at
all in the assembly format for `DILocalVariable`.

Most of the testcase updates were generated by the following sed script:

    find test/ -name "*.ll" -o -name "*.mir" |
    xargs grep -l 'DILocalVariable' |
    xargs sed -i '' \
      -e 's/tag: DW_TAG_arg_variable, //' \
      -e 's/tag: DW_TAG_auto_variable, //'

There were only a handful of tests in `test/Assembly` that I needed to
update by hand.

(Note: a follow-up could change `DILocalVariable::DILocalVariable()` to
set the tag to `DW_TAG_formal_parameter` instead of `DW_TAG_variable`
(as appropriate), instead of having that logic magically in the backend
in `DbgVariable`.  I've added a FIXME to that effect.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243774 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 18:58:39 +00:00
David Majnemer
4a45f0871a New EH representation for MSVC compatibility
This introduces new instructions neccessary to implement MSVC-compatible
exception handling support.  Most of the middle-end and none of the
back-end haven't been audited or updated to take them into account.

Differential Revision: http://reviews.llvm.org/D11097

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243766 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 17:58:14 +00:00
Benjamin Kramer
3973e4b71b [CodeGenPrepare] Compress a pair. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243759 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 17:00:39 +00:00
Daniel Sanders
289b5e7f39 [regalloc] Make RegMask clobbers prevent merging vreg's into PhysRegs when hoisting def's upwards.
Summary:
This prevents vreg260 and D7 from being merged in:
  %vreg260<def> = LDC1 ...
  JAL <ga:@sin>, <regmask ... list not containing D7 ...>
  %D7<def> = COPY %vreg260; ...
Doing so is not valid because the JAL clobbers the D7.

This fixes the almabench regression in the LLVM 3.7.0 release branch.

Reviewers: MatzeB

Subscribers: MatzeB, qcolombet, hans, llvm-commits

Differential Revision: http://reviews.llvm.org/D11649


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243745 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 12:58:55 +00:00
Alex Lorenz
2623dd4454 MIR Parser: Report an error when a constant pool item is redefined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243696 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 22:00:17 +00:00
Alex Lorenz
2bc631660b MIR Parser: Report an error when a virtual register is redefined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243695 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 21:54:10 +00:00
Sanjay Patel
8a6197a968 fix memcpy/memset/memmove lowering when optimizing for size
Fixing MinSize attribute handling was discussed in D11363. 
This is a prerequisite patch to doing that.

The handling of OptSize when lowering mem* functions was broken
on Darwin because it wants to ignore -Os for these cases, but the
existing logic also made it ignore -Oz (MinSize).

The Linux change demonstrates a widespread problem. The backend
doesn't usually recognize the MinSize attribute by itself; it
assumes that if the MinSize attribute exists, then the OptSize 
attribute must also exist. 

Fixing this more generally will be a follow-on patch or two.

Differential Revision: http://reviews.llvm.org/D11568



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243693 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 21:41:50 +00:00
Sanjay Patel
3b00227629 enable fast-math-flag propagation to DAG nodes
This uncovered latent bugs previously:
http://reviews.llvm.org/D10403

...but it's time to try again because internal tests aren't finding more.

If time passes and no other bugs are reported, we can remove this cl::opt.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243687 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 21:06:55 +00:00
Mehdi Amini
93204d28b8 Add a TargetMachine hook that verifies DataLayout compatibility
Summary: Also provide the associated assertion when CodeGen starts.

Reviewers: echristo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11654

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243682 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 20:33:18 +00:00
Alex Lorenz
fbd94791e6 MIR Serialization: Serialize the machine basic block's successor weights.
Reviewers: Duncan P. N. Exon Smith


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2015-07-30 16:54:38 +00:00