Commit Graph

147382 Commits

Author SHA1 Message Date
Matt Arsenault
513e714dfd AMDGPU: Remove llvm.SI.vs.load.input
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299391 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 21:45:13 +00:00
Matt Arsenault
5b7b340242 DAG: Fix missing legalization for any_extend_vector_inreg operands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299389 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 21:28:13 +00:00
Reid Kleckner
2c2955a045 [codeview] Add support for label type records
MASM can produce these type records.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299388 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 21:25:20 +00:00
Simon Pilgrim
dc4f56dd52 [X86][SSE]] Lower BUILD_VECTOR with repeated elts as BUILD_VECTOR + VECTOR_SHUFFLE
It can be costly to transfer from the gprs to the xmm registers and can prevent loads merging.

This patch splits vXi16/vXi32/vXi64 BUILD_VECTORS that use the same operand in multiple elements into a BUILD_VECTOR with only a single insertion of each of those elements and then performs an unary shuffle to duplicate the values.

There are a couple of minor regressions this patch unearths due to some missing MOVDDUP/BROADCAST folds that I will address in a future patch.

Note: Now that vector shuffle lowering and combining is pretty good we should be reusing that instead of duplicating so much in LowerBUILD_VECTOR - this is the first of several patches to address this.

Differential Revision: https://reviews.llvm.org/D31373

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299387 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 21:06:51 +00:00
Craig Topper
d1815f3bc3 [InstCombine] Remove canonicalization for (X & C1) | C2 --> (X | C2) & (C1|C2) when C1 & C2 have common bits.
It turns out that SimplifyDemandedInstructionBits will get called earlier and remove bits from C1 first. Effectively doing (X & (C1&C2)) | C2. So by the time it got to this check there could be no common bits.

I think the DAGCombiner has the same check but its check can be executed because it handles demanded bits later. I'll look at it next.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299384 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 20:41:47 +00:00
Amjad Aboud
019f65e751 x86 interrupt calling convention: re-align stack pointer on 64-bit if an error code was pushed
The x86_64 ABI requires that the stack is 16 byte aligned on function calls. Thus, the 8-byte error code, which is pushed by the CPU for certain exceptions, leads to a misaligned stack. This results in bugs such as Bug 26413, where misaligned movaps instructions are generated.

This commit fixes the misalignment by adjusting the stack pointer in these cases. The adjustment is done at the beginning of the prologue generation by subtracting another 8 bytes from the stack pointer. These additional bytes are popped again in the function epilogue.

Fixes Bug 26413

Patch by Philipp Oppermann.

Differential Revision: https://reviews.llvm.org/D30049

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299383 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 20:28:45 +00:00
Jun Bum Lim
78c95b332b [CodeGenPrep] move aarch64-type-promotion to CGP
Summary:
Move the aarch64-type-promotion pass within the existing type promotion framework in CGP.
This change also support forking sexts when a new sext is required for promotion.
Note that change is based on D27853 and I am submitting this out early to provide a better idea on D27853.

Reviewers: jmolloy, mcrosier, javed.absar, qcolombet

Reviewed By: qcolombet

Subscribers: llvm-commits, aemerson, rengolin, mcrosier

Differential Revision: https://reviews.llvm.org/D28680

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299379 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 19:20:07 +00:00
Craig Topper
445d3cfd6b [DAGCombine][InstCombine] Fix inverted if condition in equivalent comments in DAGCombine and InstCombine. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299378 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 19:18:48 +00:00
Joel Jones
5b2afe9ffb Fix LLVMBuild.txt typo. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299373 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 18:21:50 +00:00
Matt Arsenault
cd7c9c3178 AMDGPU: Remove legacy bfe intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299372 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 18:08:08 +00:00
Graydon Hoare
211802721c [Support] Make printAllJSONValues public, for custom output.
Summary:
This changes the static method TimerGroup::printAllJSONValues from private to
public, to match the static method TimerGroup::printAll. When trying to drive
the reporting machinery by hand, the existing API is _almost_ flexible enough,
but this entrypoint is required to intermix printing timers with other
non-timer output.

The underlying motive here is a Swift change to consolidate the collection of
timers, LLVM statistics and other (non-assert-dependent) counters into JSON
files, which requires a bit of manual intervention in LLVM's stat and timer
output routines. See https://github.com/apple/swift/pull/8477 for details.

Reviewers: MatzeB

Reviewed By: MatzeB

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31566

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299371 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 18:04:15 +00:00
Peter Collingbourne
7bceb16031 Bitcode: Remove reader support for MODULE_CODE_PURGEVALS.
Support for writing this module code was removed in r73220, which was well
before the LLVM 3.0 release, so we do not need to be able to understand it
for backwards compatibility.

Differential Revision: https://reviews.llvm.org/D31563

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299370 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 17:58:48 +00:00
Craig Topper
aee31d3e9a [InstCombine] Add test cases showing how we fail to fold vector constants into selects the way we do with scalars.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299369 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 17:49:15 +00:00
Zvi Rackover
f60f35be0a Revert "[DAGCombine] A shuffle of a splat is always the splat itself"
This reverts commit r299047 which is incorrect because the
simplification may result in incorrect propogation of undefs to users of
the folded shuffle.

Thanks to Andrea Di Biagio for pointing this out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299368 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 17:41:19 +00:00
Krzysztof Parzyszek
ab1bde3393 [Hexagon] Factor out some common code in HexagonEarlyIfConv.cpp, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299367 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 17:26:40 +00:00
Craig Topper
1cca49874c Revert r299337 "[InstCombine] Remove redundant combine from visitAnd"
One of the tsan bots started failing at this commit. I don't see anything obviously wrong with the commit so trying this to see if it recovers.

Failing log: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-autoconf/builds/6792



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299366 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 17:22:23 +00:00
Sanjay Patel
7d1d15ba84 [InstCombine] fix formatting for foldLogOpOfMaskedICmps and related bits; NFCI
1. Improve enum, function, and variable names.
2. Improve comments.
3. Fix variable capitalization.
4. Run clang-format.

As an existing code comment suggests, this should work with vector types / splat constants too,
so making this look right first will reduce the diffs needed for that change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299365 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 16:53:12 +00:00
Craig Topper
68149f546e [APInt] Move isMask and isShiftedMask out of APIntOps and into the APInt class. Implement them without memory allocation for multiword
This moves the isMask and isShiftedMask functions to be class methods. They now use the MathExtras.h function for single word size and leading/trailing zeros/ones or countPopulation for the multiword size. The previous implementation made multiple temorary memory allocations to do the bitwise arithmetic operations to match the MathExtras.h implementation.

Differential Revision: https://reviews.llvm.org/D31565




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299362 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 16:34:59 +00:00
Simon Pilgrim
3c078c1589 [DAGCombiner] Check limits before accessing array element (PR32502)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299361 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 15:27:49 +00:00
Sjoerd Meijer
d369b4141b ARMAsmParser: clean up of isImmediate functions
- we are now using immediate AsmOperands so that the range check functions are
  tablegen'ed.
- Big bonus is that error messages become much more accurate, i.e. instead of a
  useless "invalid operand" error message it will not say that the immediate
  operand must in range [x,y], which is why regression tests needed updating.

More tablegen operand descriptions could probably benefit from using
immediateAsmOperand, but this is a first good step to get rid of most of the
nearly identical range check functions. I will address the remaining immediate
operands in next clean ups.

Differential Revision: https://reviews.llvm.org/D31333



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299358 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 14:50:04 +00:00
Craig Topper
38c71d6289 [InstCombine] Make foldOpWithConstantIntoOperand take a BinaryOperator instead of a generic Instruction.
It blindly assumes there are two operands so make it explicit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299351 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 07:08:08 +00:00
Craig Topper
77e7374775 [InstCombine] Remove a And transform that should be handled by SimplifyDemandedInstructionBits. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299349 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-03 06:02:09 +00:00
NAKAMURA Takumi
23a948a82f Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299344 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 23:57:17 +00:00
NAKAMURA Takumi
995bf6a159 Reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299343 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 23:57:10 +00:00
Craig Topper
c94363ef7c [APInt] Make use of whichWord and maskBit to simplify some code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299342 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 19:35:18 +00:00
Craig Topper
6b60db9e91 [APInt] Add a public typedef for the internal type of APInt use it instead of integerPart. Make APINT_BITS_PER_WORD and APINT_WORD_SIZE public.
This patch is one step to attempt to unify the main APInt interface and the tc functions used by APFloat.

This patch adds a WordType to APInt and uses that in all the tc functions. I've added temporary typedefs to APFloat to alias it to integerPart to keep the patch size down. I'll work on removing that in a future patch.

In future patches I hope to reuse the tc functions to implement some of the main APInt functionality.

I may remove APINT_ from BITS_PER_WORD and WORD_SIZE constants so that we don't have the repetitive APInt::APINT_ externally.

Differential Revision: https://reviews.llvm.org/D31523

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299341 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 19:17:22 +00:00
Craig Topper
9071ac1443 [InstCombine] Make InstCombiner::OptAndOp take a BinaryOperator instead of an Instruction.
The callers have already performed the necessary cast before calling. This allows us to remove a comment that says the instruction must be a BinaryOperator and make it explicit in the argument type.

Had to add a default case to the switch because BinaryOperator::getOpcode() returns a BinaryOps enum.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299339 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 17:57:30 +00:00
Simon Pilgrim
07ccae240a [X86][MMX] Improve support for folding fptosi from XMM to MMX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299338 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 17:45:41 +00:00
Craig Topper
9e3a09349c [InstCombine] Remove redundant combine from visitAnd
As far as I can tell this combine is fully handled by SimplifyDemandedInstructionBits.

I was only looking at this because it is the only user of APIntOps::isShiftedMask which is itself broken. As demonstrated by r299187. I was going to fix isShiftedMask and needed to make sure we had coverage for the new cases it would expose to this combine. But looks like we can nuke it instead.

Differential Revision: https://reviews.llvm.org/D31543

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299337 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 17:34:30 +00:00
Simon Pilgrim
888b181566 [X86][MMX] Simplify tablegen patterns by always combining MOVDQ2Q from v2i64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299336 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 16:20:34 +00:00
Simon Pilgrim
4475a6621a [X86][MMX] Added support for subvector extraction to MMX register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299335 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 15:52:28 +00:00
NAKAMURA Takumi
5a5f4253b8 APInt.h: Prune \param(s) in \returns. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299334 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 15:05:18 +00:00
Simon Pilgrim
a323ca7103 Regenerate test with codegen. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299333 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 14:21:14 +00:00
Simon Pilgrim
c21f4c0e26 Regenerate test with codegen. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299332 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 13:59:37 +00:00
Simon Pilgrim
9960918c01 Regenerate test. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299331 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 13:50:44 +00:00
Daniel Berlin
72710465b6 NewGVN: Handle coercion of constant stores, loads, memory insts.
Summary:
Depends on D30928.

This adds support for coercion of stores and memory instructions that do not require insertion to process.
Another few tests down.
I added the relevant tests from rle.ll

Reviewers: davide

Subscribers: llvm-commits, Prazek

Differential Revision: https://reviews.llvm.org/D30929

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299330 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 13:23:44 +00:00
Nikolai Bozhenov
650bf3e599 [BypassSlowDivision] Do not bypass division of hash-like values
Disable bypassing if one of the operands looks like a hash value. Slow
division often occurs in hashtable implementations and fast division is
never taken there because a hash value is extremely unlikely to have
enough upper bits set to zero.

A value is considered to be hash-like if it is produced by

1) XOR operation
2) Multiplication by a constant wider than the shorter type
3) PHI node with all incoming values being hash-like

Differential Revision: https://reviews.llvm.org/D28200


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299329 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 13:14:30 +00:00
Simon Pilgrim
bd2ffa7d85 [X86][MMX] Add generic fptosi 4f32-4i32 test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299328 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 13:10:20 +00:00
Zvi Rackover
a544ecba50 Add another interesting shufflevector test case for InstSimplify. NFC.
Test case shows opportunity to constant fold a shuffle with one variable
input vector operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299327 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 10:42:21 +00:00
Craig Topper
8290bf9842 [X86] Use tcAdd/tcSubtract to implement the slow case of operator+=/operator-=.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299326 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 06:59:43 +00:00
Craig Topper
c3f2c54438 [APInt] Combine declaration and initialization. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299325 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 06:59:41 +00:00
Craig Topper
4010109a87 [APInt] Simplify some code by using operator+=(uint64_t) instead of doing a more complex assignment into a temporary APInt just to use the APInt operator+=.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299324 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 06:59:38 +00:00
Craig Topper
e991dabbb6 [APInt] Fix typo in comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299323 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 06:59:36 +00:00
Daniel Berlin
fe76989fe7 MemorySSA: Add support for caching clobbering access in stores
Summary:
This enables us to cache the clobbering access for stores, despite the
fact that we can't rewrite the use-def chains themselves.

Early testing shows that, after this change, for larger testcases, it will be a significant net positive (memory and time) to remove the walker caching.

Reviewers: george.burgess.iv, davide

Subscribers: Prazek, llvm-commits

Differential Revision: https://reviews.llvm.org/D31567

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299322 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-02 05:09:15 +00:00
Craig Topper
548688adbd [APInt] Use conditional operator to simplify some code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299320 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-01 21:50:10 +00:00
Craig Topper
9bf6f549d3 [APInt] Implement flipAllBitsSlowCase with tcComplement. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299319 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-01 21:50:08 +00:00
Craig Topper
ef14ce8e1b [APInt] Fix indentation. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299318 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-01 21:50:06 +00:00
Craig Topper
e222bade09 [APInt] Implement AndAssignSlowCase using tcAnd. Do the same for Or and Xor. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299317 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-01 21:50:03 +00:00
Craig Topper
2ea3d99e26 [APInt] Allow GreatestCommonDivisor to take rvalue inputs efficiently. Use moves instead of copies in the loop.
Summary:
GreatestComonDivisor currently makes a copy of both its inputs. Then in the loop we do one move and two copies, plus any allocation the urem call does.

This patch changes it to take its inputs by value so that we can do a move of any rvalue inputs instead of copying. Then in the loop we do 3 move assignments and no copies. This way the only possible allocations we have in the loop is from the urem call.

Reviewers: dblaikie, RKSimon, hans

Reviewed By: dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31572

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299314 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-01 20:30:57 +00:00
Davide Italiano
084c1ea3b4 [WASM] Remove other comparison of unsigned expression >= 0.
This should finally fix the GCC 7 build with -Werror.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299313 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-01 19:47:52 +00:00