Commit Graph

104768 Commits

Author SHA1 Message Date
Hiroshi Inoue
e3b8cd6b61 fix typos in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308127 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-16 08:11:56 +00:00
Hiroshi Inoue
2dd9bf3147 fix typos in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308126 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-16 07:48:48 +00:00
Craig Topper
a72a0bef4d [InstSimplify] Use commutable matchers to simplify some code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308125 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-16 06:57:41 +00:00
Craig Topper
279ac88b99 [InstCombine] Move (0 - x) & 1 --> x & 1 to SimplifyDemandedUseBits.
This removes a dedicated matcher and allows us to support more than just an AND masking the lower bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308124 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-16 05:37:58 +00:00
Teresa Johnson
1599b9c3d6 Restore with fix "[ThinLTO] Ensure we always select the same function copy to import"
This restores r308078/r308079 with a fix for bot non-determinisim (make
sure we run llvm-lto in single threaded mode so the debug output doesn't get
interleaved).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308114 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 22:58:06 +00:00
Craig Topper
fce917909c [IR] Implement Constant::isNegativeZeroValue/isZeroValue/isAllOnesValue/isOneValue/isMinSignedValue for ConstantDataVector without going through getElementAsConstant
Summary:
Currently these methods call ConstantDataVector::getSplatValue which uses getElementsAsConstant to create a Constant object representing the element value. This method incurs a map lookup to see if we already have created such a Constant before and if not allocates a new Constant object.

This patch changes these methods to use getElementAsAPFloat and getElementAsInteger so we can just examine the data values directly.

Reviewers: spatel, pcc, dexonsmith, bogner, craig.topper

Reviewed By: craig.topper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35040

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308112 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 22:06:19 +00:00
Craig Topper
1cadf61272 [InstCombine] Improve the expansion in SimplifyUsingDistributiveLaws to handle cases where one side doesn't simplify, but the other side resolves to an identity value
Summary:
If one side simplifies to the identity value for inner opcode, we can replace the value with just the operation that can't be simplified.

I've removed a couple now unneeded special cases in visitAnd and visitOr. There are probably other cases I missed.

Reviewers: spatel, majnemer, hfinkel, dberlin

Reviewed By: spatel

Subscribers: grandinj, llvm-commits, spatel

Differential Revision: https://reviews.llvm.org/D35451

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308111 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 21:49:49 +00:00
Simon Pilgrim
5cb1c23dce Strip trailing whitespace. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308108 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 19:29:19 +00:00
Reid Kleckner
4a5ccd44d5 [CodeView] Dump BuildInfoSym and ProcSym type indices
I need to print the type index in hex so that I can match it in
FileCheck for a test I'm writing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308107 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 18:10:39 +00:00
Sanjay Patel
c09fbb030f [InstCombine] improve (1 << x) & 1 --> zext(x == 0) folding
1. Add a one-use check to prevent increasing instruction count.
2. Generalize the pattern matching to include vector types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308105 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 17:26:01 +00:00
Sanjay Patel
e039298b16 [InstCombine] allow (0 - x) & 1 --> x & 1 for vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308098 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 15:29:47 +00:00
Sanjay Patel
170e6bc8a4 [InstCombine] remove dead code/tests; NFCI
These patterns and tests were added to InstSimplify with:
https://reviews.llvm.org/rL303004


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308096 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 15:01:33 +00:00
Chandler Carruth
feeb38706f Revert r308078 (and subsequent tweak in r308079) which introduces a test
that appears to exhibit non-determinism and is flaking on the bots
pretty consistently.

r308078: [ThinLTO] Ensure we always select the same function copy to import
r308079: Require asserts in new test that uses debug flag

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308095 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 13:50:26 +00:00
Florian Hahn
e998b6e37f [LoopInterchange] Add some optimization remarks.
Reviewers: anemet, karthikthecool, blitz.opensource

Reviewed By: anemet

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D35122

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308094 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 13:13:19 +00:00
Chandler Carruth
ed504111e8 [PM/LCG] Teach the LazyCallGraph to maintain reference edges from every
function to every defined function known to LLVM as a library function.

LLVM can introduce calls to these functions either by replacing other
library calls or by recognizing patterns (such as memset_pattern or
vector math patterns) and replacing those with calls. When these library
functions are actually defined in the module, we need to have reference
edges to them initially so that we visit them during the CGSCC walk in
the right order and can effectively rebuild the call graph afterward.

This was discovered when building code with Fortify enabled as that is
a common case of both inline definitions of library calls and
simplifications of code into calling them.

This can in extreme cases of LTO-ing with libc introduce *many* more
reference edges. I discussed a bunch of different options with folks but
all of them are unsatisfying. They either make the graph operations
substantially more complex even when there are *no* defined libfuncs, or
they introduce some other complexity into the callgraph. So this patch
goes with the simplest possible solution of actual synthetic reference
edges. If this proves to be a memory problem, I'm happy to implement one
of the clever techniques to save memory here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308088 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 08:08:19 +00:00
Simon Atanasyan
b515119244 [mips] Handle the long-calls feature flags in the MIPS backend
If the `long-calls` feature flags is enabled, disable use of the `jal`
instruction. Instead of that call a function by by first loading its
address into a register, and then using the contents of that register.

Differential revision: https://reviews.llvm.org/D35168

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308087 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 07:14:25 +00:00
NAKAMURA Takumi
55ceb9c2d8 SystemZCodeGen: Update libdeps. r308024 introduced LoopDataPrefetchPass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308086 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 06:32:12 +00:00
Yonghong Song
d7e9378a79 bpf: fix a compilation bug due to unused variable for release build
Signed-off-by: Yonghong Song <yhs@fb.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308083 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 06:08:08 +00:00
Matt Arsenault
078c435803 AMDGPU: Return correct type during argument lowering
The type needs to be casted back to the original argument type.
Fixes an assert that for some reason is only run when
using -debug.

Includes an additional combine to avoid test regressions
from having conversions mixed with multiple Assert[SZ]ext
nodes. On subtargets where i16 is legal, this was producing an i32
register with an i16 AssertZExt, truncated to i16 with another i8
AssertZExt.

t2: i32,ch = CopyFromReg t0, Register:i32 %vreg0
t3: i16 = truncate t2
t5: i16 = AssertZext t3, ValueType:ch:i8
t6: i8 = truncate t5
t7: i32 = zero_extend t6

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308082 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 05:52:59 +00:00
Dinar Temirbulatov
31b76d9b4a [SLPVectorizer] Add an extra parameter to tryScheduleBundle function, NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308081 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 05:43:54 +00:00
Yonghong Song
7c423e0690 bpf: generate better lowering code for certain select/setcc instructions
Currently, for code like below,
===
  inner_map = bpf_map_lookup_elem(outer_map, &port_key);
  if (!inner_map) {
    inner_map = &fallback_map;
  }
===
the compiler generates (pseudo) code like the below:
===
  I1: r1 = bpf_map_lookup_elem(outer_map, &port_key);
  I2: r2 = 0
  I3: if (r1 == r2)
  I4:   r6 = &fallback_map
  I5: ...
===

During kernel verification process, After I1, r1 holds a state
map_ptr_or_null. If I3 condition is not taken
(path [I1, I2, I3, I5]), supposedly r1 should become map_ptr.
Unfortunately, kernel does not recognize this pattern
and r1 remains map_ptr_or_null at insn I5. This will cause
verificaiton failure later on.

Kernel, however, is able to recognize pattern "if (r1 == 0)"
properly and give a map_ptr state to r1 in the above case.

LLVM here generates suboptimal code which causes kernel verification
failure. This patch fixes the issue by changing BPF insn pattern
matching and lowering to generate proper codes if the righthand
parameter of the above condition is a constant. A test case
is also added.

Signed-off-by: Yonghong Song <yhs@fb.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308080 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 05:41:42 +00:00
Teresa Johnson
5758e8da00 [ThinLTO] Ensure we always select the same function copy to import
Summary:
Check if the first eligible callee is under the instruction threshold.
Checking this on the first eligible callee ensures that we don't end
up selecting different callees to import when we invoke this routine
with different thresholds due to reaching the callee via paths that
are shallower or hotter (when there are multiple copies, i.e. with
weak or linkonce linkage). We don't want to leave the decision of which
copy to import up to the backend.

Reviewers: mehdi_amini

Subscribers: inglorion, fhahn, llvm-commits

Differential Revision: https://reviews.llvm.org/D35436

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308078 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 04:53:05 +00:00
Haicheng Wu
8c939cb97f [TTI] Refine the cost of EXT in getUserCost()
Now, getUserCost() only checks the src and dst types of EXT to decide it is free
or not. This change first checks the types, then calls isExtFreeImpl(), and
check if EXT can form ExtLoad at last. Currently, only AArch64 has customized
implementation of isExtFreeImpl() to check if EXT can be folded into its use.

Differential Revision: https://reviews.llvm.org/D34458

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308076 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 02:12:16 +00:00
Kostya Serebryany
2cf034ebb7 [libFuzzer] remove stale code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308075 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-15 01:31:40 +00:00
Justin Bogner
948973b73f [libFuzzer] Allow non-fuzzer args after -ignore_remaining_args=1
With this change, libFuzzer will ignore any arguments after a sigil
argument, but it will preserve these arguments at the end of the
command line when launching subprocesses. Using this, its possible to
handle positional and single-dash arguments to the program under test
by discarding everything up to -ignore_remaining_args=1 in
LLVMFuzzerInitialize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308069 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 23:33:04 +00:00
Jakub Kuderski
82f51d560c [Dominators] Implement incremental deletions
Summary:
This patch implements incremental edge deletions.

It also makes DominatorTreeBase store a pointer to the parent function. The parent function is needed to perform full rebuilts during some deletions, but it is also used to verify that inserted and deleted edges come from the same function.

Reviewers: dberlin, davide, grosser, sanjoy, brzycki

Reviewed By: dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35342

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308062 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 21:58:53 +00:00
Kostya Serebryany
7bdecb4953 [libFuzzer] fix stats during merge
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308061 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 21:48:19 +00:00
Yi Kong
2377605d24 [AArch64] Avoid selecting XZR inline ASM memory operand
Restricting register class to PointerRegClass for memory operands.

Also fix the PointerRegClass for AArch64 from GPR64 to GPR64sp, since
XZR cannot hold a memory pointer while SP is.

Fixes PR33134.

Differential Revision: https://reviews.llvm.org/D34999

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308060 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 21:46:16 +00:00
Geoff Berry
7d7873efde [AArch64][Falkor] Avoid HW prefetcher tag collisions (step 1)
Summary:
This patch is the first step in reducing HW prefetcher instruction tag
collisions in inner loops for Falkor.  It adds a pass that annotates IR
loads with metadata to indicate that they are known to be strided loads,
and adds a target lowering hook that translates this metadata to a
target-specific MachineMemOperand flag.

A follow on change will use this MachineMemOperand flag to re-write
instructions to reduce tag collisions.

Reviewers: mcrosier, t.p.northover

Subscribers: aemerson, rengolin, mgorny, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D34963

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308059 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 21:44:12 +00:00
Davide Italiano
33778b7f13 [AMDGPU] Throw away more dead code. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308055 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 21:20:29 +00:00
Jakub Kuderski
79eefe9ee2 [Dominators] Implement incremental insertions
Summary:
This patch introduces incremental edge insertions based on the Depth Based Search algorithm.

Insertions should work for both dominators and postdominators.

Reviewers: dberlin, grosser, davide, sanjoy, brzycki

Reviewed By: dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35341

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308054 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 21:17:33 +00:00
Dimitry Andric
a774076f84 Fix mixed line terminators. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308052 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 21:14:58 +00:00
Geoff Berry
fe9291f15d [EarlyCSE] Handle calls with no MemorySSA info.
Summary:
When checking for memory dependencies between calls using MemorySSA,
handle cases where the calls have no MemoryAccess associated with them
because the AA analysis being used has determined that the call does not
read/write memory.

Fixes PR33756

Reviewers: dberlin, davide

Subscribers: mcrosier, llvm-commits, Prazek

Differential Revision: https://reviews.llvm.org/D35317

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308051 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 20:13:21 +00:00
Haicheng Wu
18e1269d26 [JumpThreading] Add a pattern to TryToUnfoldSelectInCurrBB()
Add the following pattern to TryToUnfoldSelectInCurrBB()

bb:
   %p = phi [0, %bb1], [1, %bb2], [0, %bb3], [1, %bb4], ...
   %c = cmp %p, 0
   %s = select %c, trueval, falseval

The Select in the above pattern will be unfolded and then jump-threaded. The
current implementation does not allow CMP in the middle of PHI and Select.

Differential Revision: https://reviews.llvm.org/D34762

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308050 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 19:16:47 +00:00
Krzysztof Parzyszek
2670e69e43 [Hexagon] Replace ISD opcode VPACK with VPACKE/VPACKO, NFC
This breaks up pack-even and pack-odd into two separate operations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308049 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 19:02:32 +00:00
Davide Italiano
9994117767 [AMDGPU] Garbage collect dead code. NFCI.
Unbreaks the build with GCC7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308047 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 18:47:29 +00:00
Jakub Kuderski
cb105529db [Dominators] Make IsPostDominator a template parameter
Summary:
DominatorTreeBase used to have IsPostDominators (bool) member to indicate if the tree is a dominator or a postdominator tree. This made it possible to switch between the two 'modes' at runtime, but it isn't used in practice anywhere.

This patch makes IsPostDominator a template argument. This way, it is easier to switch between different algorithms at compile-time based on this argument and design external utilities around it. It also makes it impossible to incidentally assign a postdominator tree to a dominator tree (and vice versa), and to further simplify template code in GenericDominatorTreeConstruction.

Reviewers: dberlin, sanjoy, davide, grosser

Reviewed By: dberlin

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D35315

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308040 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 18:26:09 +00:00
Alfred Huang
1356a150af [AMDGPU] Do not insert an instruction into worklist twice in movetovalu
In moveToVALU(), move to vector ALU is performed, all instrs in
the use chain will be visited. We do not want the same node to be
pushed to the visit worklist more than once.

Differential Revision: https://reviews.llvm.org/D34726

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308039 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 17:56:55 +00:00
Krzysztof Parzyszek
9d612bd4f5 [Hexagon] Add intrinsics for data cache operations
This is the LLVM part, adding definitions for
  void @llvm.hexagon.Y2.dccleana(i8*)
  void @llvm.hexagon.Y2.dccleaninva(i8*)
  void @llvm.hexagon.Y2.dcinva(i8*)
  void @llvm.hexagon.Y2.dczeroa(i8*)
  void @llvm.hexagon.Y4.l2fetch(i8*, i32)
  void @llvm.hexagon.Y5.l2fetch(i8*, i64)
The clang part will follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308032 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 15:58:48 +00:00
Sanjay Patel
af49601847 [InstCombine] convert bitwise (in)equality checks to logical ops (PR32401)
As discussed in:
https://bugs.llvm.org/show_bug.cgi?id=32401

we have a backend transform to undo this:
https://reviews.llvm.org/rL299542

when it's likely that the xor version leads to better codegen, but we want 
this form in IR for better analysis and simplification potential.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308031 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 15:09:49 +00:00
Simon Dardis
a457d34397 Revert "Reland "[mips][mt][6/7] Add support for mftr, mttr instructions.""
FileCheck is crashing on in the input file, so reverting again while
I investigate.

This reverts r308023.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308030 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 15:08:05 +00:00
Jonas Paulsson
d051d7f142 [SystemZ] Minor fixing in SystemZScheduleZ196.td
Some minor corrections for the recently added instructions.

Review: Ulrich Weigand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308028 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 14:30:46 +00:00
Nirav Dave
be4d3e6292 Improve Aliasing of operations to static alloca
Recommiting after adding check to avoid miscomputing alias information
on addresses of the same base but different subindices.

Memory accesses offset from frame indices may alias, e.g., we
may merge write from function arguments passed on the stack when they
are contiguous. As a result, when checking aliasing, we consider the
underlying frame index's offset from the stack pointer.

Static allocs are realized as stack objects in SelectionDAG, but its
offset is not set until post-DAG causing DAGCombiner's alias check to
consider access to static allocas to frequently alias. Modify isAlias
to consider access between static allocas and access from other frame
objects to be considered aliasing.

Many test changes are included here. Most are fixes for tests which
indirectly relied on our aliasing ability and needed to be modified to
preserve their original intent.

The remaining tests have minor improvements due to relaxed
ordering. The exception is CodeGen/X86/2011-10-19-widen_vselect.ll
which has a minor degradation dispite though the pre-legalized DAG is
improved.

Reviewers: rnk, mkuper, jonpa, hfinkel, uweigand

Reviewed By: rnk

Subscribers: sdardis, nemanjai, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D33345

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308025 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 13:56:21 +00:00
Jonas Paulsson
7392b5ac28 [SystemZ] Enable LoopDataPrefetch pass.
Loop data prefetching has shown some improvements on benchmarks, and is
enabled at -O1 and above.

Review: Ulrich Weigand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308024 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 13:52:38 +00:00
Simon Dardis
f98930962b Reland "[mips][mt][6/7] Add support for mftr, mttr instructions.""
Unlike many other instructions, these instructions have aliases which
take coprocessor registers, gpr register, accumulator (and dsp accumulator)
registers, floating point registers, floating point control registers and
coprocessor 2 data and control operands.

For the moment, these aliases are treated as pseudo instructions which are
expanded into the underlying instruction. As a result, disassembling these
instructions shows the underlying instruction and not the alias.

Reviewers: slthakur, atanasyan

Differential Revision: https://reviews.llvm.org/D35253

The last version of this patch broke one of the expensive checks buildbots,
this version changes the failing test/MC/Mips/mt/invalid.s and other invalid
tests to write the errors to a file and run FileCheck on that, rather than
relying on the 'not llvm-mc ... <%s 2>&1 | Filecheck %s' idiom.

Hopefully this will sarisfy the buildbot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308023 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 13:44:12 +00:00
Zoran Jovanovic
8f691f1275 Reverting commit 308011.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308017 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 10:52:22 +00:00
Zoran Jovanovic
3a788ca0f4 [mips][microMIPS] Extending size reduction pass with ADDIUSP and ADDIUR1SP
Author: milena.vujosevic.janicic
Reviewers: sdardis
The patch extends size reduction pass for MicroMIPS.
The following instructions are examined and transformed, if possible:
ADDIU instruction is transformed into 16-bit instruction ADDIUSP
ADDIU instruction is transformed into 16-bit instruction ADDIUR1SP
Function InRange is changed to avoid left shifting of negative values, since 
that caused some sanitizer tests to fail (so the previous patch 
Differential Revision: https://reviews.llvm.org/D34511


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308011 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 10:13:11 +00:00
Diana Picus
a6ef55bfe2 [ARM] GlobalISel: Support G_BRCOND
Insert a TSTri to set the flags and a Bcc to branch based on their
values. This is a bit inefficient in the (common) cases where the
condition for the branch comes from a compare right before the branch,
since we set the flags both as part of the compare lowering and as part
of the branch lowering. We're going to live with that until we settle on
a principled way to handle this kind of situation, which occurs with
other patterns as well (combines might be the way forward here).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308009 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 09:46:06 +00:00
Jonas Paulsson
95753226ff [SystemZ] Minor fixing in SystemZScheduleZEC12.td
Some minor corrections for the recently added instructions.

Review: Ulrich Weigand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308007 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 09:18:18 +00:00
Sam Parker
676084e2a9 [ARM] Allow rematerialization of ARM Thumb literal pool loads
Constants are crucial for code size in the ARM Thumb-1 instruction
set. The 16 bit instruction size often does not offer enough space
for immediate arguments. This means that additional instructions are
frequently used to load constants into registers. Since constants are
hoisted, this can lead to significant register spillage if they are
used multiple times in a single function. This can be avoided by
rematerialization, i.e. recomputing a constant instead of reloading
it from the stack. This patch fixes the rematerialization of literal
pool loads in the ARM Thumb instruction set.

Patch by Philip Ginsbach

Differential Revision: https://reviews.llvm.org/D33936


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308004 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-14 08:23:56 +00:00