Commit Graph

141810 Commits

Author SHA1 Message Date
Sam McCall
ec5ae20d53 Add missing parens in assert.
Summary: Add missing parens in assert, which warn in GCC.

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27448

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288792 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 10:14:36 +00:00
Chandler Carruth
ff117bc9cb [PM] Basic cleanups to CGSCC update code, NFC.
Just using InstIterator, simpler loop structures, and making better use
of the visit callback infrastructure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288790 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 10:06:06 +00:00
Craig Topper
8368f754a7 [X86] Remove another weird scalar sqrt/rcp/rsqrt pattern.
This pattern turned a vector sqrt/rcp/rsqrt operation of sse_load_f32/f64 into the the scalar instruction for the operation and put undef into the upper bits. For correctness, the resulting code should still perform the sqrt/rcp/rsqrt on the upper bits after the load is extended since that's what the operation asked for. Particularly in the case where the upper bits are 0, in that case we need calculate the sqrt/rcp/rsqrt of the zeroes and keep the result in the upper-bits. This implies we should be using the packed instruction still.

The only test case for this pattern is one I just added so there was no coverage of this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288784 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 08:08:12 +00:00
Craig Topper
10b8bf3510 [X86] Add test case demonstrating a case where a vector sqrt being passed (scalar_to_vector loadf64) uses a scalar sqrt instruction.
This occurs due to a pattern that uses sse_load_f32/f64 with vector sqrt/rcp/rsqrt operations and turns them into scalar instructions. Perhaps for the case were the upper bits come from undef this is ok.  I believe a (vzmovl load64) would do the same thing but those seems to become vzload instead and selectScalarSSELoad doesn't handle that today. In that case we should be performing the vector operation on the zeros in the upper bits which is not equivalent to using a scalar instruction.

I will remove this pattern in a follow up patch. There appears to be no other test content for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288783 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 08:08:09 +00:00
Craig Topper
0659581d34 [X86] Regenerate a test using update_llc_test_checks.py
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288782 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 08:08:07 +00:00
Craig Topper
c7da972d1d [X86] Remove bad pattern that caused 128-bit loads being used by scalar sqrt/rcp/rsqrt intrinsics to select the memory form of the corresponding instruction and violate the semantics of the intrinsic.
The intrinsics are supposed to pass the upper bits straight through to their output register. This means we need to make sure we still perform the 128-bit load to get those upper bits to pass to give to the instruction since the memory form of the instruction only reads 32 or 64 bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288781 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 08:08:04 +00:00
Craig Topper
de4f9d5a4f [X86] Add test case that shows a scalar sqrtsd intrinsic of a 128-bit vector load using the load form of the sqrtsd instruction which violates the intrinsic semantics.
The sqrtsd instruction only loads 64-bits and writes bits 63:0 with the sqrt result. Bits 127:64 are preserved in the destination register. The semantics of the intrinsic indicate bits 127:64 should come from the intrinsic argument which in this case is a 128-bit load. So the generated code should have a 128-bit load and use a register form of sqrtsd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288780 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 08:08:01 +00:00
Craig Topper
64ddc83afd [X86] Correct pattern for VSQRTSSr_Int, VSQRTSDr_Int, VRCPSSr_Int, and VRSQRTSSr_Int to not have an IMPLICIT_DEF on the first input. The semantics of the intrinsic are clear and not undefined.
The intrinsic takes one argument, the lower bits are affected by the operation and the upper bits should be passed through. The instruction itself takes two operands, the high bits of the first operand are passed through and the low bits of the second operand are modified by the operation. To match this to the intrinsic we should pass the single intrinsic input to both operands.

I had to remove the stack folding test for these instructions since they depended on the incorrect behavior. The same register is now used for both inputs so the load can't be folded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288779 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 08:07:58 +00:00
Chris Bieneman
4a6766e76f [ObjectYAML] First bit of support for encoding DWARF in MachO
This patch adds the starting support for encoding data from the MachO __DWARF segment. The first section supported is the __debug_str section because it is the simplest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288774 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 06:00:49 +00:00
Craig Topper
25dd36e1c9 [X86] Remove scalar logical op alias instructions. Just use COPY_FROM/TO_REGCLASS and the normal packed instructions instead
Summary:
This patch removes the scalar logical operation alias instructions. We can just use reg class copies and use the normal packed instructions instead. This removes the need for putting these instructions in the execution domain fixing tables as was done recently.

I removed the loadf64_128 and loadf32_128 patterns as DAG combine creates a narrower load for (extractelt (loadv4f32)) before we ever get to isel.

I plan to add similar patterns for AVX512DQ in a future commit to allow use of the larger register class when available.

Reviewers: spatel, delena, zvi, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27401

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288771 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 04:58:39 +00:00
Chris Bieneman
dfe568d766 [CMake] Cleanup TableGen include flags
It is kinda crazy to have llvm/include and llvm/lib/Target in the include path for every tablegen invocation for every tablegen-like tool.

This patch removes those flags from the tablgen function that is called everywhere by instead creating a variable LLVM_TABLEGEN_FLAGS which is setup in the LLVM source directories.

This removes TableGen.cmake's dependency on LLVM_MAIN_SRC_DIR, and LLVM_MAIN_INCLUDE_DIR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288770 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 04:45:11 +00:00
Philip Reames
7c651d6dd2 [LVI] Remove dead code in mergeIn
Integers are expressed in the lattice via constant ranges.  They can never be represented by constants or not-constants; those are reserved for non-integer types.  This code has been dead for literaly years.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288767 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 03:34:33 +00:00
Philip Reames
19937b05c3 [LVI] Extract a helper function
Extracting a helper function out of solveBlockValue makes the contract around the cache much easier to understand.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288766 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 03:22:03 +00:00
Philip Reames
ab3b56e2dc [LVI] Hide the last markX function on LVILatticeVal
This completes a small series of patches to hide the stateful updates of LVILatticeVal from the consuming code.  The only remaining stateful API is mergeIn.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288765 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 03:01:08 +00:00
Philip Reames
36c7a94155 [LVI] Hide a confusing internal interface
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288764 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 02:54:16 +00:00
Mandeep Singh Grang
9196899788 [llvm] Fix D26214: Move error handling out of MC and to the callers.
Summary: Related clang patch; https://reviews.llvm.org/D27360

Reviewers: t.p.northover, grosbach, compnerd, echristo

Subscribers: compnerd, mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D27359

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288763 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 02:49:17 +00:00
Philip Reames
d37747e061 [LVI] Remove duplicate code using existing helper function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288761 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 02:36:58 +00:00
Davide Italiano
4b6e5ecd86 Revert "[SCCP] Remove manual folding of terminator instructions."
This reverts commit r288725 as it broke a bot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288759 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 02:26:50 +00:00
Zijiao Ma
1af757cc00 Refactor TargetParserTests.
The TargetParser tests are a bit redundant. Refactor them in a more
repeatable way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288758 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 02:22:08 +00:00
Mehdi Amini
1e117391d7 Introduces cmake option LLVM_DISABLE_ABI_BREAKING_CHECKS_ENFORCING
Summary:
We recently introduced a feature that enforce at link-time that the
LLVM headers used by a clients are matching the ABI setting of the
LLVM library linked to.

However for clients that are using only headers from ADT and promise
they won't call into LLVM, this is forcing to link libSupport. This
new flag is intended to provide a way to configure LLVM with this
promise for such client.

Reviewers: bob.wilson, compnerd

Subscribers: mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D27432

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288754 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 01:23:04 +00:00
Matt Arsenault
a079dfc363 AMDGPU: Don't required structured CFG
The structured CFG is just an aid to inserting exec
mask modification instructions, once that is done
we don't really need it anymore. We also
do not analyze blocks with terminators that
modify exec, so this should only be impacting
true branches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288744 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 01:02:51 +00:00
Bob Haarman
db18d34db4 revert inadvertedly introduced build break
Summary:
r288722 introduced a build break due some code that should
not have been part of the commit. This change removes the offending
code.

Reviewers: davide, ruiu

Differential Revision: https://reviews.llvm.org/D27435


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288742 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 00:55:55 +00:00
Weiming Zhao
943496ffc4 Summary: Currently there is no way to disable deprecated warning from asm like this
clang  -target arm deprecated-asm.s -c
  deprecated-asm.s:30:9: warning: use of SP or PC in the list is deprecated
       stmia   r4!, {r12-r14}

We have to have an option what can disable it.

Patched by Yin Ma!

Reviewers: joey, echristo, weimingz

Subscribers: llvm-commits, aemerson

Differential Revision: https://reviews.llvm.org/D27219

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288734 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 23:55:13 +00:00
Kostya Serebryany
fe3cc4d2c5 [libFuzzer] refactor the code to allow collecting features in different ways. Also initialize a couple of Fuzzer:: members that might have been used uninitialized :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288731 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 23:35:22 +00:00
Tim Northover
416ccca7e0 GlobalISel: avoid looking too closely at PHIs when we bail.
The function used to finish off PHIs by adding the relevant basic blocks can
fail if we're aborting and still don't actually have the needed
MachineBasicBlocks. So avoid trying in that case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288727 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 23:10:19 +00:00
Davide Italiano
8ea5797013 [SCCP] Remove manual folding of terminator instructions.
There are two cases handled here:
1) a branch on undef
2) a switch with an undef condition.

Both cases are currently handled by ResolvedUndefsIn. If we have
a branch on undef, we force its value to false (which is trivially
foldable). If we have a switch on undef, we force to the first
constant (which is also foldable).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288725 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 23:04:21 +00:00
Davide Italiano
fb77f46543 [TableGen] Centralize/Unify error handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288724 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 22:58:01 +00:00
Bob Haarman
9398e86991 [pdb] handle missing pdb streams more gracefully
Summary: The code we use to read PDBs assumed that streams we ask it to read exist, and would read memory outside a vector and crash if this wasn't the case. This would, for example, cause llvm-pdbdump to crash on PDBs generated by lld. This patch handles such cases more gracefully: the PDB reading code in LLVM now reports errors when asked to get a stream that is not present, and llvm-pdbdump will report missing streams and continue processing streams that are present.

Reviewers: ruiu, zturner

Subscribers: thakis, amccarth

Differential Revision: https://reviews.llvm.org/D27325

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288722 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 22:44:00 +00:00
Tim Northover
9fef274c6a GlobalISel: place constants correctly in the entry block.
When the entry block was empty after arg lowering, we were always placing
constants at the end. This is probably hamrless while translating the same
block, but horribly wrong once its terminator has been translated. So switch to
inserting at the beginning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288720 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 22:40:13 +00:00
Matt Arsenault
792cdf8f92 AMDGPU: Consolidate inline immediate predicate functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288718 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 22:26:17 +00:00
Tim Northover
75dfa0e7c6 GlobalISel: handle pointer arguments that get assigned to the stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288717 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 22:20:32 +00:00
Matt Arsenault
b51e031eff AMDGPU: Minor assembler refactoring
Fix return before else, check types for selecting
fltSemantics, refactor immediate checks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288715 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 22:07:21 +00:00
Eugene Zelenko
cfa44507a2 [IR] Fix some Clang-tidy modernize-use-equals-delete and Include What You Use warnings; other minor fixes (NFC).
Also remove obsolete comment from CommandLine.h spotted by Malcolm Parsons.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288714 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 21:55:02 +00:00
Tim Northover
e1db4f7b15 GlobalISel: translate constants larger than 64 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288713 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 21:54:17 +00:00
Tim Northover
ad46a07d21 GlobalISel: make G_CONSTANT take a ConstantInt rather than int64_t.
This makes it more similar to the floating-point constant, and also allows for
larger constants to be translated later. There's no real functional change in
this patch though, just syntax updates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288712 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 21:47:07 +00:00
Tim Northover
bcadc2717e GlobalISel: improve translation fallback for constants.
Returning 0 (NoReg) from getOrCreateVReg leads to unexpected situations later
in the translation. It's better to return a valid (if undefined) register and
let the rest of the instruction carry on as planned.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288709 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 21:40:33 +00:00
Tim Northover
14a3520a09 GlobalISel: handle 1-element aggregates during ABI lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288706 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 21:25:33 +00:00
Keno Fischer
99ca52276f [LAA] Prevent invalid IR for loop-invariant bound in loop body
Summary:
If LAA expands a bound that is loop invariant, but not hoisted out
of the loop body, it used to use that value anyway, causing a
non-domination error, because the memcheck block is of course not
dominated by the scalar loop body. Detect this situation and expand
the SCEV expression instead.

Fixes PR31251

Reviewers: anemet
Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D27397

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288705 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 21:25:03 +00:00
Michael Kuperstein
8bb9ea4ceb [X86] Fix non-intrinsic roundss/roundsd to not read the destination register
This changes the scalar non-intrinsic non-avx roundss/sd instruction
definitions not to read their destination register - allowing partial dependency
breaking.

This fixes PR31143.

Differential Revision: https://reviews.llvm.org/D27323


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288703 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 20:57:37 +00:00
Matt Arsenault
923a40060f AMDGPU: Assembler support for exp
compr is not currently parsed (or printed) correctly,
but that should probably be fixed along with
intrinsic changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288698 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 20:42:41 +00:00
Matt Arsenault
3acbc32a69 AMDGPU: Change how exp is printed
This is an improvement over a long list of unreadable numbers.
A follow up patch will try to match how sc formats these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288697 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 20:31:49 +00:00
Matt Arsenault
350d0dab1e AMDGPU: Refactor exp instructions
Structure the definitions a bit more like the other classes.

The main change here is to split EXP with the done bit set
to a separate opcode, so we can set mayLoad = 1 so that it won't
be reordered before the other exp stores, since this has the special
constraint that if the done bit is set then this should be the last
exp in she shader.

Previously all exp instructions were inferred to have unmodeled
side effects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288695 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 20:23:10 +00:00
Eric Fiselier
5b9f351e17 [lit] Support custom parsers in parseIntegratedTestScript
Summary:
Libc++ frequently has the need to parse more than just the builtin *test keywords* (`RUN`, `REQUIRES`, `XFAIL`, ect). For example libc++ currently needs a new keyword `MODULES-DEFINES: macro list...`. Instead of re-implementing the script parsing in libc++ this patch allows `parseIntegratedTestScript` to take custom parsers.

This patch introduces a new class `IntegratedTestKeywordParser` which implements the logic to parse/process a test keyword. Parsing of various keyword "kinds" are supported out of the box, including 'TAG', 'COMMAND', and 'LIST', which parse keywords such as `END.`, `RUN:` and `XFAIL:` respectively.

As an example after this change libc++ can implement the `MODULES-DEFINES` simply using: 
```
mparser = IntegratedTestKeywordParser('MODULES-DEFINES:', ParserKind.LIST)
parseIntegratedTestScript(test, additional_parsers=[mparser])
macro_list = mparser.getValue()
```


Reviewers: ddunbar, modocache, rnk, danalbert, jroelofs

Subscribers: mgrang, llvm-commits, cfe-commits

Differential Revision: https://reviews.llvm.org/D27005

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288694 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 20:21:21 +00:00
Matthias Braun
9478556f8f TableGen/AsmMatcherEmitter: Bring sorting check back under EXPENSIVE_CHECKS
Bring the sorting check back that I removed in r288655 but put it under
EXPENSIVE_CHECKS this time. Also document that this the check isn't
purely about having a sorted list but also about operator < having the
correct transitive behavior.

Apply the same to the other check in the file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288693 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 19:44:31 +00:00
Quentin Colombet
0689e744d2 [AArch64][RegisterBankInfo] Fix typo in the logic used in assert.
Thanks to David Binderman <dcb314@hotmail.com> for bringing it to my
attention.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288688 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 19:02:37 +00:00
Adrian Prantl
460dd60c1a [DIExpression] Introduce a dedicated DW_OP_LLVM_fragment operation
so we can stop using DW_OP_bit_piece with the wrong semantics.

The entire back story can be found here:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20161114/405934.html

The gist is that in LLVM we've been misinterpreting DW_OP_bit_piece's
offset field to mean the offset into the source variable rather than
the offset into the location at the top the DWARF expression stack. In
order to be able to fix this in a subsequent patch, this patch
introduces a dedicated DW_OP_LLVM_fragment operation with the
semantics that we used to apply to DW_OP_bit_piece, which is what we
actually need while inside of LLVM. This patch is complete with a
bitcode upgrade for expressions using the old format. It does not yet
fix the DWARF backend to use DW_OP_bit_piece correctly.

Implementation note: We discussed several options for implementing
this, including reserving a dedicated field in DIExpression for the
fragment size and offset, but using an custom operator at the end of
the expression works just fine and is more efficient because we then
only pay for it when we need it.

Differential Revision: https://reviews.llvm.org/D27361
rdar://problem/29335809

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288683 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 18:04:47 +00:00
Chris Bieneman
79adb742d1 [CMake] Fix symlink refactor for multi-configuration generators
This fix, while a bit complicated, preserves the reusability while fixing the issues reported on llvm-commits with visual studio generators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288679 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 17:02:11 +00:00
Sanjay Patel
bb03f57f04 [TargetLowering] add special-case for demanded bits analysis of 'not'
We treat bitwise 'not' as a special operation and try not to reduce its all-ones mask. 
Presumably, this is because a 'not' may be cheaper than a generic 'xor' or it may get
folded into another logic op if the target has those. However, if we can remove a logic
instruction by changing the xor's constant mask value, that should always be a win.

Note that the IR version of SimplifyDemandedBits() does not treat 'not' as a special-case
currently (although that's marked with a FIXME). So if you run this IR through -instcombine,
you should get the same end result. I'm hoping to add a different backend transform that 
will expose this problem though, so I need to solve this first.

Differential Revision: https://reviews.llvm.org/D27356


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288676 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 15:58:21 +00:00
Sanjay Patel
da70d5a32a [x86] fold fand (fxor X, -1) Y --> fandn X, Y
I noticed this gap in the scalar FP-logic matching with:
D26712
and:
rL287171

Differential Revision: https://reviews.llvm.org/D27385


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288675 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 15:45:27 +00:00
Simon Pilgrim
4b0a367e90 Use range based for loop. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288671 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 14:25:04 +00:00